added commands xschem get schprop|schvhdprop|schverilogprop|schtedaxprop|schsymbolprop, "xschem create_text" renamed to "xschem text" for syntax consistency
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@ -492,16 +492,6 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
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@ -581,13 +571,6 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
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Create an xplot file in netlist/simulation directory with
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the list of highlighted nodes in a format the selected waveform
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viewer understands (bespice, gaw, ngspice) </pre>
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<li><kbd> create_text draw x y rot flip text props size</kbd></li><pre>
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Create a text object
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draw is a flag. If set to 1 will draw the created text
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x, y, rot, flip specify the position and orientation
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text is the text string
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props is the attribute string
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size sets the size </pre>
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<li><kbd> cut</kbd></li><pre>
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Cut selection to clipboard </pre>
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<li><kbd> debug n</kbd></li><pre>
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@ -689,6 +672,11 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
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<li><kbd> sellayer </kbd> layer number for selection </li>
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<li><kbd> semaphore </kbd> used for debug </li>
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<li><kbd> schname </kbd> get full path of current sch. if 'n' given get sch of level 'n' </li>
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<li><kbd> schprop </kbd> get schematic "spice" global attributes </li>
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<li><kbd> schvhdlprop </kbd> get schematic "vhdl" global attributes </li>
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<li><kbd> schverilogprop </kbd> get schematic "verilog" global attributes </li>
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<li><kbd> schsymbolprop </kbd> get schematic "symbol" global attributes </li>
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<li><kbd> schtedaxprop </kbd> get schematic "tedax" global attributes </li>
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<li><kbd> sch_path </kbd> get hierarchy path. if 'n' given get hierpath of level 'n' </li>
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<li><kbd> sch_to_compare </kbd> if set return schematic current design is compared with </li>
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<li><kbd> temp_dir </kbd> get windows temporary dir </li>
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@ -1257,6 +1245,13 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
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0.0 0.0 1.8 0.3
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0.1 0.0 1.5 0.6
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... ... ... ...</pre>
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<li><kbd> text x y rot flip text props size draw</kbd></li><pre>
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Create a text object
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x, y, rot, flip specify the position and orientation
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text is the text string
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props is the attribute string
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size sets the size
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draw is a flag. If set to 1 will draw the created text </pre>
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<li><kbd> test </kbd></li><pre>
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testmode </pre>
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<li><kbd> toggle_colorscheme</kbd></li><pre>
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@ -1333,6 +1328,16 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
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@ -27,7 +27,7 @@ proc create_graph {title rawfile node {analysis tran} {color {4 5 6 7 8 9 10 11
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xschem clear force
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# add title text
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xschem create_text 1 30 -350 0 0 $title {} 0.5
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xschem text 30 -350 0 0 $title {} 0.5 1
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# clear loaded raw file if any
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xschem raw_clear
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# set current layer to graph layer (grey, layer 2)
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@ -38,7 +38,7 @@ proc place_sym_pins {filename dir {x 0} {y 0} {spacing 20}} {
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xschem rect $x1 $y1 $x2 $y2 -1 "name=$name dir=$dir" 0
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xschem set rectcolor 4 ;# symbol line color
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xschem line $x $y [expr {$x + $line_offset}] $y {} 0
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xschem create_text 0 [expr {$x + $offset}] [expr {$y - 4}] 0 $flip $name {} 0.2
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xschem text [expr {$x + $offset}] [expr {$y - 4}] 0 $flip $name {} 0.2 0
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incr y $spacing
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}
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xschem set schsymbolprop "type=subcircuit\nformat=\"@name @pinlist @symname\"\ntemplate=\"name=X1\""
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@ -567,24 +567,6 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
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Tcl_ResetResult(interp);
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}
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/* create_text draw x y rot flip text props size
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* Create a text object
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* draw is a flag. If set to 1 will draw the created text
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* x, y, rot, flip specify the position and orientation
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* text is the text string
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* props is the attribute string
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* size sets the size */
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else if(!strcmp(argv[1], "create_text") )
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{
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if(!xctx) {Tcl_SetResult(interp, not_avail, TCL_STATIC); return TCL_ERROR;}
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if(argc > 9) {
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create_text(atoi(argv[2]), atof(argv[3]), atof(argv[4]), atoi(argv[5]), atoi(argv[6]),
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argv[7], argv[8], atof(argv[9]), atof(argv[9]));
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}
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Tcl_ResetResult(interp);
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}
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/* cut
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* Cut selection to clipboard */
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else if(!strcmp(argv[1], "cut"))
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@ -1189,6 +1171,26 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
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Tcl_SetResult(interp, xctx->sch[x], TCL_VOLATILE);
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}
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}
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else if(!strcmp(argv[2], "schprop")) /* get schematic "spice" global attributes */
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{
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Tcl_SetResult(interp, xctx->schprop ? xctx->schprop : "", TCL_VOLATILE);
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}
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else if(!strcmp(argv[2], "schvhdlprop")) /* get schematic "vhdl" global attributes */
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{
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Tcl_SetResult(interp, xctx->schvhdlprop ? xctx->schvhdlprop : "", TCL_VOLATILE);
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}
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else if(!strcmp(argv[2], "schverilogprop")) /* get schematic "verilog" global attributes */
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{
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Tcl_SetResult(interp, xctx->schverilogprop ? xctx->schverilogprop : "", TCL_VOLATILE);
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}
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else if(!strcmp(argv[2], "schsymbolprop")) /* get schematic "symbol" global attributes */
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{
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Tcl_SetResult(interp, xctx->schsymbolprop ? xctx->schsymbolprop : "", TCL_VOLATILE);
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}
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else if(!strcmp(argv[2], "schtedaxprop")) /* get schematic "tedax" global attributes */
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{
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Tcl_SetResult(interp, xctx->schtedaxprop ? xctx->schtedaxprop : "", TCL_VOLATILE);
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}
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else if(!strcmp(argv[2], "sch_path")) /* get hierarchy path. if 'n' given get hierpath of level 'n' */
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{
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int x;
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@ -4393,6 +4395,25 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
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Tcl_ResetResult(interp);
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}
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/* text x y rot flip text props size draw
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* Create a text object
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* x, y, rot, flip specify the position and orientation
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* text is the text string
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* props is the attribute string
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* size sets the size
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* draw is a flag. If set to 1 will draw the created text */
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else if(!strcmp(argv[1], "text") )
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{
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if(!xctx) {Tcl_SetResult(interp, not_avail, TCL_STATIC); return TCL_ERROR;}
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if(argc < 10) {Tcl_SetResult(interp,
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"xschem text requires 8 additional arguments", TCL_STATIC); return TCL_ERROR;}
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create_text(atoi(argv[9]), atof(argv[2]), atof(argv[3]), atoi(argv[4]), atoi(argv[5]),
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argv[6], argv[7], atof(argv[8]), atof(argv[9]));
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Tcl_ResetResult(interp);
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}
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/* test
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* testmode */
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else if(!strcmp(argv[1], "test"))
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