finalizing "select nets up to junctions"

This commit is contained in:
Stefan Frederik 2021-01-03 01:26:54 +01:00
parent 65fc659129
commit b63d3bec09
8 changed files with 48 additions and 42 deletions

Binary file not shown.

After

Width:  |  Height:  |  Size: 24 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 38 KiB

View File

@ -638,7 +638,13 @@ int callback(int event, int mx, int my, KeySym key,
dbg(1, "callback(): new color: %d\n",color_index[xctx->rectcolor]);
break;
}
/* select connected nets/pins/lanels */
/* select connected nets/pins/labels up to T junctions */
if(key==XK_Delete && (xctx->ui_state & SELECTION) && state == ControlMask )
{
if(xctx->semaphore >= 2) break;
select_connected_wires(1);break;
}
/* select connected nets/pins/labels */
if(key==XK_Delete && (xctx->ui_state & SELECTION) && state == ShiftMask )
{
if(xctx->semaphore >= 2) break;

View File

@ -27,7 +27,7 @@ void rebuild_selected_array() /* can be used only if new selected set is lower *
{
int i,c;
dbg(1, "rebuild selected array\n");
dbg(2, "rebuild selected array\n");
if(!xctx->need_reb_sel_arr) return;
xctx->lastsel=0;
for(i=0;i<xctx->texts;i++)

View File

@ -108,38 +108,36 @@ void select_connected_wires(int stop_at_junction)
if(xctx->wire[i].sel == SELECTED) check_connected_wire(stop_at_junction, i);
break;
case ELEMENT:
if(!stop_at_junction) {
type = (xctx->inst[i].ptr+ xctx->sym)->type;
if( type && (IS_LABEL_SH_OR_PIN(type) || !strcmp(type, "probe") || !strcmp(type, "ngprobe"))) {
double rx1, ry1, x0, y0;
int rot, flip, sqx, sqy;
xRect *rct;
struct wireentry *wptr;
rct = (xctx->inst[i].ptr+ xctx->sym)->rect[PINLAYER];
if(rct) {
x0 = (rct[0].x1 + rct[0].x2) / 2;
y0 = (rct[0].y1 + rct[0].y2) / 2;
rot = xctx->inst[i].rot;
flip = xctx->inst[i].flip;
ROTATION(rot, flip, 0.0,0.0,x0,y0,rx1,ry1);
x0 = xctx->inst[i].x0+rx1;
y0 = xctx->inst[i].y0+ry1;
get_square(x0, y0, &sqx, &sqy);
wptr = xctx->wiretable[sqx][sqy];
while (wptr) {
dbg(1, "select_connected_wires(): x0=%g y0=%g wire[%d]=%g %g %g %g\n",
x0, y0, wptr->n, xctx->wire[wptr->n].x1, xctx->wire[wptr->n].y1,
xctx->wire[wptr->n].x2, xctx->wire[wptr->n].y2);
if (touch(xctx->wire[wptr->n].x1, xctx->wire[wptr->n].y1,
xctx->wire[wptr->n].x2, xctx->wire[wptr->n].y2, x0,y0)) {
xctx->wire[wptr->n].sel = SELECTED;
check_connected_wire(stop_at_junction, wptr->n);
}
wptr=wptr->next;
}
} /* if(rct) */
} /* if(type & ...) */
} /* if(!stop_at_junction) */
type = (xctx->inst[i].ptr+ xctx->sym)->type;
if( type && (IS_LABEL_SH_OR_PIN(type) || !strcmp(type, "probe") || !strcmp(type, "ngprobe"))) {
double rx1, ry1, x0, y0;
int rot, flip, sqx, sqy;
xRect *rct;
struct wireentry *wptr;
rct = (xctx->inst[i].ptr+ xctx->sym)->rect[PINLAYER];
if(rct) {
x0 = (rct[0].x1 + rct[0].x2) / 2;
y0 = (rct[0].y1 + rct[0].y2) / 2;
rot = xctx->inst[i].rot;
flip = xctx->inst[i].flip;
ROTATION(rot, flip, 0.0,0.0,x0,y0,rx1,ry1);
x0 = xctx->inst[i].x0+rx1;
y0 = xctx->inst[i].y0+ry1;
get_square(x0, y0, &sqx, &sqy);
wptr = xctx->wiretable[sqx][sqy];
while (wptr) {
dbg(1, "select_connected_wires(): x0=%g y0=%g wire[%d]=%g %g %g %g\n",
x0, y0, wptr->n, xctx->wire[wptr->n].x1, xctx->wire[wptr->n].y1,
xctx->wire[wptr->n].x2, xctx->wire[wptr->n].y2);
if (touch(xctx->wire[wptr->n].x1, xctx->wire[wptr->n].y1,
xctx->wire[wptr->n].x2, xctx->wire[wptr->n].y2, x0,y0)) {
xctx->wire[wptr->n].sel = SELECTED;
check_connected_wire(stop_at_junction, wptr->n);
}
wptr=wptr->next;
}
} /* if(rct) */
} /* if(type & ...) */
break;
default:
break;

View File

@ -792,7 +792,7 @@ const char *subst_token(const char *s, const char *tok, const char *new_val)
}
else my_strdup(1212, &new_val_copy, new_val);
} else new_val_copy = NULL;
dbg(1, "subst_token(): %s, %s, %s\n", s, tok, new_val);
dbg(1, "subst_token(): %s, %s, %s\n", s ? s : "<NULL>", tok ? tok : "<NULL>", new_val ? new_val : "<NULL>");
sizetok = size = CADCHUNKALLOC;
my_realloc(1152, &result, size);
my_realloc(1153, &token, sizetok);

View File

@ -4043,9 +4043,17 @@ if { ( $::OS== "Windows" || [string length [lindex [array get env DISPLAY] 1] ]
-command "xschem break_wires" -accelerator {!}
toolbar_create ToolBreak "xschem break_wires" "Break Wires"
.menubar.tools.menu add checkbutton -label "Auto Join/Trim Wires" -variable autotrim_wires \
-command { xschem set autotrim_wires $autotrim_wires}
-command {
xschem set autotrim_wires $autotrim_wires
if {$autotrim_wires == 1} {
xschem trim_wires
xschem redraw
}
}
.menubar.tools.menu add command -label "Select all connected wires/labels/pins" -accelerator {Shift-Delete} \
-command { xschem connected_nets}
.menubar.tools.menu add command -label "Select conn. wires, stop at junctions" -accelerator {Ctrl-Delete} \
-command { xschem connected_nets 1 }
.menubar.hilight.menu add command -label {Highlight net-pin name mismatches on selected instancs} \
-command "xschem net_pin_mismatch" \

View File

@ -92,12 +92,6 @@ N 340 -1180 560 -1180 {lab=VPP}
N 1110 -1180 1110 -790 { lab=VPP}
N 560 -1180 1110 -1180 {lab=VPP}
N 230 -950 800 -950 { lab=#net2}
N 1290 -370 1450 -370 { lab=#net8}
N 1450 -370 1570 -370 { lab=#net8}
N 1450 -490 1450 -370 { lab=#net8}
N 1300 -300 1450 -300 { lab=#net9}
N 1450 -300 1570 -240 { lab=#net9}
N 1450 -340 1450 -300 { lab=#net9}
C {ipin.sym} 530 -160 0 0 {name=p0 lab=PLUS}
C {ipin.sym} 530 -120 0 0 {name=p2 lab=VPP}
C {ipin.sym} 530 -100 0 0 {name=p3 lab=VNN}