add command xschem logic_set_net <net_name> <value> [ntimes] to set a specific net instead of selected nets

doc/xschem_man/developer_info.html

@@ -776,8 +776,17 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
   <li><kbd>       logic_get net_name</kbd></li><pre>
   Get logic state of net named 'net_name'
   Returns 0, 1, 2, 3 for logic levels 0, 1, X, Z or nothing if no net found.</pre>
-  <li><kbd>       logic_set n num</kbd></li><pre>
-  Set selected nets, net labels or pins to logic level 'n' 'num' times.
+  <li><kbd>       logic_set_net net_name n [num]</kbd></li><pre>
+  set 'net_name' to logic level 'n' 'num' times.
+  'n': 
+  0  set to logic value 0
+  1  set to logic value 1
+  2  set to logic value X
+  3  set to logic value Z
+  -1  toggle logic valie (1-&gt;0, 0-&gt;1)
+  the 'num' parameter is essentially useful only with 'toggle' (-1)  value</pre>
+  <li><kbd>       logic_set n [num]</kbd></li><pre>
+  set selected nets, net labels or pins to logic level 'n' 'num' times.
   'n': 
   0  set to logic value 0
   1  set to logic value 1
@@ -1113,7 +1122,6 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
   Zoom to selection </pre>
 
 
-
  </ul>
 
 

src/callback.c

@@ -2101,8 +2101,8 @@ int callback(const char *winpath, int event, int mx, int my, KeySym key,
    }
    if(key >= '0' && key <= '4' && state == 0) {  /* toggle pin logic level */
      if(xctx->semaphore >= 2) break;
-     if(key == '4') logic_set(-1, 1);
-     else logic_set((int)key - '0', 1);
+     if(key == '4') logic_set(-1, 1, NULL);
+     else logic_set((int)key - '0', 1, NULL);
      break;
    }
    if(key=='L' && state == (Mod1Mask | ShiftMask)) {                         /* add pin label*/

src/hilight.c

@@ -1600,7 +1600,7 @@ static void propagate_logic()
   /* my_free(_ALLOC_ID_, &propagated_net); */
 }
 
-void logic_set(int value, int num)
+void logic_set(int value, int num, const char *net_name)
 {
   int i, j, n, newval;
   char *type;
@@ -1620,7 +1620,15 @@ void logic_set(int value, int num)
     bbox(ADD, boundbox.x1, boundbox.y1, boundbox.x2, boundbox.y2);
   }
   for(j = 0; j < num; ++j) {
-    for(i=0;i<xctx->lastsel; ++i)
+    if(net_name) {
+      if(value == -1) { /* toggle */
+        entry = bus_hilight_hash_lookup(net_name, 0, XLOOKUP);
+        if(entry)
+          newval = (entry->value == LOGIC_1) ? 0 : (entry->value == LOGIC_0) ? 1 : 2;
+        else newval = 2;
+      }
+      bus_hilight_hash_lookup(net_name, map[newval], XINSERT);
+    } else for(i=0;i<xctx->lastsel; ++i)
     {
       char *node = NULL;
       n = xctx->sel_array[i].n;

src/scheduler.c

@@ -1892,8 +1892,30 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
       }
     }
 
-    /* logic_set n num
-     *   Set selected nets, net labels or pins to logic level 'n' 'num' times.
+    /* logic_set_net net_name n [num]
+     *   set 'net_name' to logic level 'n' 'num' times.
+     *   'n': 
+     *       0  set to logic value 0
+     *       1  set to logic value 1
+     *       2  set to logic value X
+     *       3  set to logic value Z
+     *      -1  toggle logic valie (1->0, 0->1)
+     *   the 'num' parameter is essentially useful only with 'toggle' (-1)  value
+     */
+    else if(!strcmp(argv[1], "logic_set_net"))
+    {
+      int num =  1;
+      if(argc > 4 ) num = atoi(argv[4]);
+      if(argc > 3) {
+        int n = atoi(argv[3]);
+        if(n == 4) n = -1;
+        logic_set(n, num, argv[2]);
+      }
+      Tcl_ResetResult(interp);
+    }
+
+    /* logic_set n [num]
+     *   set selected nets, net labels or pins to logic level 'n' 'num' times.
      *   'n': 
      *       0  set to logic value 0
      *       1  set to logic value 1
@@ -1909,7 +1931,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
       if(argc > 2) {
         int n = atoi(argv[2]);
         if(n == 4) n = -1;
-        logic_set(n, num);
+        logic_set(n, num, NULL);
       }
       Tcl_ResetResult(interp);
     }

src/xschem.h

@@ -1451,7 +1451,7 @@ extern void print_verilog_signals(FILE *fd);
 extern void print_generic(FILE *fd, char *ent_or_comp, int symbol);
 extern void print_verilog_param(FILE *fd, int symbol);
 extern void hilight_net(int to_waveform);
-extern void logic_set(int v, int num);
+extern void logic_set(int v, int num, const char *net_name);
 extern int hilight_netname(const char *name);
 extern void unhilight_net();
 extern void propagate_hilights(int set, int clear, int mode);