some fixes regarding restore of areas when hilights are present, move_objects and copy_objects(): ELEMENT move/copy out of cadlayer loop.
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c806289bee
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@ -1665,9 +1665,9 @@ void new_wire(int what, double mx_snap, double my_snap)
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xRect boundbox;
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bbox(START , 0.0 , 0.0 , 0.0 , 0.0);
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if( xctx->hilight_nets ) calc_drawing_bbox(&boundbox, 2);
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bbox(ADD, boundbox.x1, boundbox.y1, boundbox.x2, boundbox.y2);
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bbox(ADD, boundbox.x1, boundbox.y1, boundbox.x2, boundbox.y2); /* <<< remove ? */
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}
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if(show_pin_net_names) {
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if(show_pin_net_names || xctx->hilight_nets) {
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int_hash_lookup(xctx->node_redraw_table, xctx->wire[xctx->wires-1].node, 0, XINSERT_NOREPLACE);
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find_inst_to_be_redrawn();
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}
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@ -1046,6 +1046,7 @@ void update_symbol(const char *result, int x)
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for(k=0;k<xctx->lastsel;k++) {
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if(xctx->sel_array[k].type!=ELEMENT) continue;
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i=xctx->sel_array[k].n;
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type=xctx->sym[xctx->inst[i].ptr].type;
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symbol_bbox(i, &xctx->inst[i].x1, &xctx->inst[i].y1, &xctx->inst[i].x2, &xctx->inst[i].y2);
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bbox(ADD, xctx->inst[i].x1, xctx->inst[i].y1, xctx->inst[i].x2, xctx->inst[i].y2);
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/* in case of net hilights, when changing 'lab' of net labels/pins we must re-run
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@ -1053,9 +1054,9 @@ void update_symbol(const char *result, int x)
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and drawn back unhilighted .
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\|/ */
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if(show_pin_net_names || xctx->hilight_nets) {
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if((show_pin_net_names || xctx->hilight_nets) && type && IS_LABEL_OR_PIN(type)) {
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prepare_netlist_structs(0);
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for(j = 0; j < (xctx->inst[i].ptr + xctx->sym)->rects[PINLAYER]; j++) {
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for(j = 0; j < (xctx->inst[i].ptr + xctx->sym)->rects[PINLAYER]; j++) { /* <<< only .node[0] ? */
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if( xctx->inst[i].node && xctx->inst[i].node[j]) {
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int_hash_lookup(xctx->node_redraw_table, xctx->inst[i].node[j], 0, XINSERT_NOREPLACE);
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}
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@ -1071,7 +1072,7 @@ void update_symbol(const char *result, int x)
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}
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}
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}
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find_inst_to_be_redrawn();
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if(show_pin_net_names || xctx->hilight_nets) find_inst_to_be_redrawn();
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/* redraw symbol with new props */
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bbox(SET,0.0,0.0,0.0,0.0);
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dbg(1, "update_symbol(): redrawing inst_ptr.txtprop string\n");
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@ -1422,10 +1422,7 @@ void draw_hilight_net(int on_window)
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int col = get_color(xctx->inst[i].color);
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symptr = (xctx->inst[i].ptr+ xctx->sym);
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if( c==0 || /*draw_symbol call is needed on layer 0 to avoid redundant work (outside check) */
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symptr->lines[c] ||
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symptr->rects[c] ||
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symptr->arcs[c] ||
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symptr->polygons[c] ||
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symptr->lines[c] || symptr->rects[c] || symptr->arcs[c] || symptr->polygons[c] ||
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((c==TEXTWIRELAYER || c==TEXTLAYER) && symptr->texts)) {
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draw_symbol(ADD, col, i,c,0,0,0.0,0.0);
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}
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981
src/move.c
981
src/move.c
File diff suppressed because it is too large
Load Diff
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@ -457,7 +457,7 @@ void wirecheck(int k) /* recursive routine */
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int x1a, x2a, y1a, y2a;
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struct wireentry *ptr2;
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xWire * const wire = xctx->wire;
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x1=wire[k].x1;
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x2=wire[k].x2;
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y1=wire[k].y1;
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@ -349,19 +349,19 @@ void delete(void)
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char *type = (xctx->inst[n].ptr + xctx->sym)->type;
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symbol_bbox(n, &xctx->inst[n].x1, &xctx->inst[n].y1, &xctx->inst[n].x2, &xctx->inst[n].y2 );
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bbox(ADD, xctx->inst[n].x1, xctx->inst[n].y1, xctx->inst[n].x2, xctx->inst[n].y2 );
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if(show_pin_net_names && type && IS_LABEL_OR_PIN(type) ) {
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for(p = 0; p < (xctx->inst[n].ptr + xctx->sym)->rects[PINLAYER]; p++) {
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if((xctx->hilight_nets || show_pin_net_names) && type && IS_LABEL_OR_PIN(type) ) {
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for(p = 0; p < (xctx->inst[n].ptr + xctx->sym)->rects[PINLAYER]; p++) { /* only .node[0] ? */
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if( xctx->inst[n].node && xctx->inst[n].node[p]) {
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int_hash_lookup(xctx->node_redraw_table, xctx->inst[n].node[p], 0, XINSERT_NOREPLACE);
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}
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}
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}
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}
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if(show_pin_net_names && xctx->sel_array[i].type == WIRE && xctx->wire[n].node) {
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if((xctx->hilight_nets || show_pin_net_names) && xctx->sel_array[i].type == WIRE && xctx->wire[n].node) {
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int_hash_lookup(xctx->node_redraw_table, xctx->wire[n].node, 0, XINSERT_NOREPLACE);
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}
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}
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find_inst_to_be_redrawn();
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if((xctx->hilight_nets || show_pin_net_names)) find_inst_to_be_redrawn();
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/* already done above
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