Allow to pass instance attributes (via translate() ) to symbol generators

This commit is contained in:
stefan schippers 2023-05-02 12:42:53 +02:00
parent fd0e036492
commit 9533b17a20
7 changed files with 198 additions and 36 deletions

View File

@ -1329,9 +1329,8 @@ static void update_symbol(const char *result, int x)
char * ss=NULL;
my_strdup(_ALLOC_ID_, &ss, xctx->inst[*ii].prop_ptr);
if( set_different_token(&ss, new_prop, xctx->old_prop) ) {
if(!pushed) { xctx->push_undo(); pushed=1;}
if(!pushed) { xctx->push_undo(); pushed=1; set_modify(1);}
my_strdup(_ALLOC_ID_, &xctx->inst[*ii].prop_ptr, ss);
set_modify(1);
}
my_free(_ALLOC_ID_, &ss);
}
@ -1340,14 +1339,12 @@ static void update_symbol(const char *result, int x)
if(!xctx->inst[*ii].prop_ptr || strcmp(xctx->inst[*ii].prop_ptr, new_prop)) {
dbg(1, "update_symbol(): changing prop: |%s| -> |%s|\n",
xctx->inst[*ii].prop_ptr, new_prop);
if(!pushed) { xctx->push_undo(); pushed=1;}
if(!pushed) { xctx->push_undo(); pushed=1; set_modify(1);}
my_strdup(_ALLOC_ID_, &xctx->inst[*ii].prop_ptr, new_prop);
set_modify(1);
}
} else {
if(!pushed) { xctx->push_undo(); pushed=1;}
if(!pushed) { xctx->push_undo(); pushed=1; set_modify(1);}
my_strdup(_ALLOC_ID_, &xctx->inst[*ii].prop_ptr, "");
set_modify(1);
}
}
}

View File

@ -2393,7 +2393,7 @@ void link_symbols_to_instances(int from)
dbg(2, "link_symbols_to_instances(): inst=%d\n", i);
dbg(2, "link_symbols_to_instances(): matching inst %d name=%s \n",i, xctx->inst[i].name);
dbg(2, "link_symbols_to_instances(): -------\n");
my_strdup2(_ALLOC_ID_, &name, tcl_hook2(xctx->inst[i].name));
my_strdup2(_ALLOC_ID_, &name, tcl_hook2(translate(i, xctx->inst[i].name)));
xctx->inst[i].ptr = match_symbol(name);
my_free(_ALLOC_ID_, &name);
}
@ -3975,7 +3975,7 @@ void descend_symbol(void)
if(ret == 0) clear_all_hilights();
if(ret == -1) return; /* user cancel */
}
my_snprintf(name, S(name), "%s", xctx->inst[n].name);
my_snprintf(name, S(name), "%s", translate(n, xctx->inst[n].name));
/* dont allow descend in the default missing symbol */
if((xctx->inst[n].ptr+ xctx->sym)->type &&
!strcmp( (xctx->inst[n].ptr+ xctx->sym)->type,"missing")) return;
@ -4043,7 +4043,7 @@ void descend_symbol(void)
"/xschem_web/", get_cell_w_ext(name, 0), NULL);
load_schematic(1, sympath, 1, 1);
} else {
dbg(1, "descend_symbol(): sympath=%s\n", sympath);
dbg(0, "descend_symbol(): sympath=%s\n", sympath);
load_schematic(1, sympath, 1, 1);
}
my_free(_ALLOC_ID_, &sympath);

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@ -851,12 +851,12 @@ static void print_vhdl_primitive(FILE *fd, int inst) /* netlist primitives, 200
else if(strcmp(token,"@symname")==0) /* of course symname must not be present */
/* in hash table */
{
const char *s = sanitize(get_sym_name(inst, 0, 0));
const char *s = sanitize(translate(inst, get_sym_name(inst, 0, 0)));
fputs(s, fd);
}
else if (strcmp(token,"@symname_ext")==0)
{
const char *s = sanitize(get_sym_name(inst, 0, 1));
const char *s = sanitize(translate(inst, get_sym_name(inst, 0, 1)));
fputs(s, fd);
}
else if(strcmp(token,"@schname_ext")==0) /* of course schname must not be present */
@ -1223,9 +1223,9 @@ void print_vhdl_element(FILE *fd, int inst)
/* print instance name and subckt */
dbg(2, "print_vhdl_element(): printing inst name & subcircuit name\n");
if( (lab = expandlabel(name, &tmp)) != NULL)
fprintf(fd, "%d %s : %s\n", tmp, lab, sanitize(get_sym_name(inst, 0, 0)) );
fprintf(fd, "%d %s : %s\n", tmp, lab, sanitize(translate(inst, get_sym_name(inst, 0, 0))) );
else /* name in some strange format, probably an error */
fprintf(fd, "1 %s : %s\n", name, sanitize(get_sym_name(inst, 0, 0)) );
fprintf(fd, "1 %s : %s\n", name, sanitize(translate(inst, get_sym_name(inst, 0, 0))) );
dbg(2, "print_vhdl_element(): printing generics passed as properties\n");
@ -1864,7 +1864,7 @@ int print_spice_element(FILE *fd, int inst)
}
else if (strcmp(token,"@symname")==0) /* of course symname must not be present in attributes */
{
const char *s = sanitize(get_sym_name(inst, 0, 0));
const char *s = sanitize(translate(inst, get_sym_name(inst, 0, 0)));
tmp = strlen(s) +100 ; /* always make room for some extra chars
* so 1-char writes to result do not need reallocs */
STR_ALLOC(&result, tmp + result_pos, &size);
@ -1873,7 +1873,7 @@ int print_spice_element(FILE *fd, int inst)
}
else if (strcmp(token,"@symname_ext")==0) /* of course symname must not be present in attributes */
{
const char *s = sanitize(get_sym_name(inst, 0, 1));
const char *s = sanitize(translate(inst, get_sym_name(inst, 0, 1)));
tmp = strlen(s) +100 ; /* always make room for some extra chars
* so 1-char writes to result do not need reallocs */
STR_ALLOC(&result, tmp + result_pos, &size);
@ -2094,7 +2094,8 @@ void print_tedax_element(FILE *fd, int inst)
int n;
Int_hashtable table={NULL, 0};
subcircuit = 1;
fprintf(fd, "__subcircuit__ %s %s\n", sanitize(get_sym_name(inst, 0, 0)), xctx->inst[inst].instname);
fprintf(fd, "__subcircuit__ %s %s\n",
sanitize(translate(inst, get_sym_name(inst, 0, 0))), xctx->inst[inst].instname);
int_hash_init(&table, 37);
for(i=0;i<no_of_pins; ++i) {
my_strdup2(_ALLOC_ID_, &net, net_name(inst,i, &net_mult, 0, 1));
@ -2231,12 +2232,12 @@ void print_tedax_element(FILE *fd, int inst)
else if(strcmp(token,"@symname")==0) /* of course symname must not be present */
/* in hash table */
{
const char *s = sanitize(get_sym_name(inst, 0, 0));
const char *s = sanitize(translate(inst, get_sym_name(inst, 0, 0)));
fputs(s, fd);
}
else if (strcmp(token,"@symname_ext")==0)
{
const char *s = sanitize(get_sym_name(inst, 0, 1));
const char *s = sanitize(translate(inst, get_sym_name(inst, 0, 1)));
fputs(s, fd);
}
else if(strcmp(token,"@schname_ext")==0) /* of course schname must not be present */
@ -2472,12 +2473,12 @@ static void print_verilog_primitive(FILE *fd, int inst) /* netlist switch level
else if(strcmp(token,"@symname")==0) /* of course symname must not be present */
/* in hash table */
{
const char *s = sanitize(get_sym_name(inst, 0, 0));
const char *s = sanitize(translate(inst, get_sym_name(inst, 0, 0)));
fputs(s, fd);
}
else if (strcmp(token,"@symname_ext")==0)
{
const char *s = sanitize(get_sym_name(inst, 0, 1));
const char *s = sanitize(translate(inst, get_sym_name(inst, 0, 1)));
fputs(s, fd);
}
else if(strcmp(token,"@schname_ext")==0) /* of course schname must not be present */

127
xschem_library/generators/nmosgen Executable file
View File

@ -0,0 +1,127 @@
#!/bin/sh
# the next line restarts using wish \
exec tclsh "$0" "$@"
set model [lindex $argv 0]
if {$model eq {nfet_g5v0d10v5}} {
puts {
v {xschem version=3.1.0 file_version=1.2}
G {}
K {type=nmos
lvs_format="@spiceprefix@name @pinlist sky130_fd_pr__@model L=@L W=@W nf=@nf m=@mult"
format="@spiceprefix@name @pinlist sky130_fd_pr__@model L=@L W=@W
+ nf=@nf ad=@ad as=@as pd=@pd ps=@ps
+ nrd=@nrd nrs=@nrs sa=@sa sb=@sb sd=@sd
+ mult=@mult m=@mult"
template="name=M1
L=0.5
W=1
nf=1
mult=1
ad=\\"'int((nf+1)/2) * W/nf * 0.29'\\"
pd=\\"'2*int((nf+1)/2) * (W/nf + 0.29)'\\"
as=\\"'int((nf+2)/2) * W/nf * 0.29'\\"
ps=\\"'2*int((nf+2)/2) * (W/nf + 0.29)'\\"
nrd=\\"'0.29 / W'\\" nrs=\\"'0.29 / W'\\"
sa=0 sb=0 sd=0
model=nfet_g5v0d10v5
spiceprefix=X
"}
V {}
S {}
E {}
L 4 20 -30 20 -17.5 {}
L 4 20 17.5 20 30 {}
L 4 7.5 -17.5 20 -17.5 {}
L 4 7.5 17.5 15 17.5 {}
L 4 7.5 -22.5 7.5 22.5 {}
L 4 -20 0 -2.5 0 {}
B 5 17.5 -32.5 22.5 -27.5 {name=D dir=inout}
B 5 -22.5 -2.5 -17.5 2.5 {name=G dir=in}
B 5 17.5 27.5 22.5 32.5 {name=S dir=inout}
B 5 19.921875 -0.078125 20.078125 0.078125 {name=B dir=in}
P 4 4 15 15 20 17.5 15 20 15 15 {fill=true}
P 4 5 -2.5 15 -2.5 -15 2.5 -15 2.5 15 -2.5 15 {}
P 5 4 20 -2.5 15 0 20 2.5 20 -2.5 {fill=true}
T {@name} 5 -30 0 1 0.2 0.2 {}
T {S} 22.5 17.5 0 0 0.15 0.15 {layer=7}
T {D} 22.5 -17.5 2 1 0.15 0.15 {layer=7}
T {B} 20 -10 0 0 0.15 0.15 {layer=7}
T {G} -10 -10 0 1 0.15 0.15 {layer=7}
T {@model} 30 -8.75 2 1 0.2 0.2 {}
T {@mult x @W / @L} 31.25 13.75 0 0 0.2 0.2 { layer=13}
T {nf=@nf} 31.25 1.25 0 0 0.2 0.2 { layer=13}
T {tcleval(gm=[to_eng [ngspice::get_node [subst -nocommand \{\\@m.$\{path\}@spiceprefix@name\\.msky130_fd_pr__@model\\[gm]\}]]] )} 32.5 -8.75 0 0 0.15 0.15 {layer=15
hide=true}
T {tcleval(id=[to_eng [ngspice::get_node [subst -nocommand \{i(\\@m.$\{path\}@spiceprefix@name\\.msky130_fd_pr__@model\\[id])\}]]] )} 32.5 -30 0 0 0.15 0.15 {layer=15
hide=true}
}
} elseif {$model eq {nfet_01v8}} {
puts {v {xschem version=3.1.0 file_version=1.2 }
G {}
K {type=nmos
lvs_format="@spiceprefix@name @pinlist sky130_fd_pr__@model L=@L W=@W nf=@nf m=@mult"
format="@spiceprefix@name @pinlist sky130_fd_pr__@model L=@L W=@W
+ nf=@nf ad=@ad as=@as pd=@pd ps=@ps
+ nrd=@nrd nrs=@nrs sa=@sa sb=@sb sd=@sd
+ mult=@mult m=@mult"
template="name=M1
L=0.15
W=1
nf=1
mult=1
ad=\\"'int((nf+1)/2) * W/nf * 0.29'\\"
pd=\\"'2*int((nf+1)/2) * (W/nf + 0.29)'\\"
as=\\"'int((nf+2)/2) * W/nf * 0.29'\\"
ps=\\"'2*int((nf+2)/2) * (W/nf + 0.29)'\\"
nrd=\\"'0.29 / W'\\" nrs=\\"'0.29 / W'\\"
sa=0 sb=0 sd=0
model=nfet_01v8
spiceprefix=X
"}
V {}
S {}
E {}
L 4 7.5 -22.5 7.5 22.5 {}
L 4 -20 0 2.5 0 {}
L 4 20 -30 20 -17.5 {}
L 4 20 17.5 20 30 {}
L 4 2.5 -15 2.5 15 {}
L 4 7.5 -17.5 20 -17.5 {}
L 4 7.5 17.5 15 17.5 {}
B 5 17.5 -32.5 22.5 -27.5 {name=D dir=inout}
B 5 -22.5 -2.5 -17.5 2.5 {name=G dir=in}
B 5 17.5 27.5 22.5 32.5 {name=S dir=inout}
B 5 19.921875 -0.078125 20.078125 0.078125 {name=B dir=in}
P 4 4 15 15 20 17.5 15 20 15 15 {fill=true}
P 5 4 20 -2.5 15 0 20 2.5 20 -2.5 {fill=true}
T {@name} 5 -30 0 1 0.2 0.2 {}
T {S} 22.5 17.5 0 0 0.15 0.15 {layer=7}
T {D} 22.5 -17.5 2 1 0.15 0.15 {layer=7}
T {B} 20 -10 0 0 0.15 0.15 {layer=7}
T {G} -10 -10 0 1 0.15 0.15 {layer=7}
T {@model} 30 -8.75 2 1 0.2 0.2 {}
T {@mult x @W / @L} 31.25 13.75 0 0 0.2 0.2 { layer=13}
T {nf=@nf} 31.25 1.25 0 0 0.2 0.2 { layer=13}
T {tcleval(gm=[to_eng [ngspice::get_node [subst -nocommand \{\\@m.$\{path\}@spiceprefix@name\\.msky130_fd_pr__@model\\[gm]\}]]] )} 32.5 -8.75 0 0 0.15 0.15 {layer=15
hide=true}
T {tcleval(id=[to_eng [ngspice::get_node [subst -nocommand \{i(\\@m.$\{path\}@spiceprefix@name\\.msky130_fd_pr__@model\\[id])\}]]] )} 32.5 -30 0 0 0.15 0.15 {layer=15
hide=true}
}
} else {
puts {
G {type=missing
format="* @name - @symname IS MISSING !!!!"
template="name=x1"}
L 8 -110 -25 -110 25 {}
L 8 -110 -25 110 -25 {}
L 8 110 -25 110 25 {}
L 8 -110 25 110 25 {}
T {@symname} -44.5 1.5 0 0 0.3 0.3 {}
T {@name} 115 -37 0 0 0.2 0.2 {}
T {---MISSING SYMBOL---} -89.5 -21 0 0 0.3 0.3 {}
}
}

View File

@ -3,15 +3,16 @@
exec tclsh "$0" "$@"
set arg1 [lindex $argv 0]
set rout [lindex $argv 1]
if { $arg1 eq {inv}} {
puts {v {xschem version=3.1.0 file_version=1.2}
puts "v {xschem version=3.1.0 file_version=1.2}
K {type=subcircuit
xvhdl_primitive=true
xverilog_primitive=true
xvhdl_format="@@y <= not @@a after 90 ps;"
xverilog_format="assign #90 @@y = ~@@a ;"
format="@name @pinlist @symname wn=@wn lln=@lln wp=@wp lp=@lp"
template="name=x1 wn=1u lln=2u wp=4u lp=2u"
xvhdl_format=\"@@y <= not @@a after 90 ps;\"
xverilog_format=\"assign #90 @@y = ~@@a ;\"
format=\"@name @pinlist @symname wn=@wn lln=@lln wp=@wp lp=@lp\"
template=\"name=x1 wn=1u lln=2u wp=4u lp=2u\"
schematic=schematicgen(inv)}
L 4 -40 0 -20 0 {}
L 4 -20 -20 20 0 {}
@ -21,20 +22,20 @@ L 4 30 -0 40 -0 {}
B 5 37.5 -2.5 42.5 2.5 {name=y dir=out }
B 5 -42.5 -2.5 -37.5 2.5 {name=a dir=in }
A 4 25 -0 5 180 360 {}
T {@symname} -47.5 24 0 0 0.3 0.3 {}
T {$arg1 $rout} -47.5 24 0 0 0.3 0.3 {}
T {@name} 25 -22 0 0 0.2 0.2 {}
T {y} 7.5 -6.5 0 1 0.2 0.2 {}
T {a} -17.5 -6.5 0 0 0.2 0.2 {}
}
"
} else {
puts {v {xschem version=3.1.0 file_version=1.2}
puts "v {xschem version=3.1.0 file_version=1.2}
K {type=subcircuit
xvhdl_primitive=true
xverilog_primitive=true
xvhdl_format="@@y <= @@a after 90 ps;"
xverilog_format="assign #90 @@y = @@a ;"
format="@name @pinlist @symname wn=@wn lln=@lln wp=@wp lp=@lp"
template="name=x1 wn=1u lln=2u wp=4u lp=2u"
xvhdl_format=\"@@y <= @@a after 90 ps;\"
xverilog_format=\"assign #90 @@y = @@a ;\"
format=\"@name @pinlist @symname wn=@wn lln=@lln wp=@wp lp=@lp\"
template=\"name=x1 wn=1u lln=2u wp=4u lp=2u\"
schematic=schematicgen(buf)}
L 4 20 0 40 0 {}
L 4 -40 0 -20 0 {}
@ -43,9 +44,9 @@ L 4 -20 -20 -20 20 {}
L 4 -20 20 20 0 {}
B 5 37.5 -2.5 42.5 2.5 {name=y dir=out }
B 5 -42.5 -2.5 -37.5 2.5 {name=a dir=in }
T {@symname} -47.5 24 0 0 0.3 0.3 {}
T {$arg1 $rout} -47.5 24 0 0 0.3 0.3 {}
T {@name} 25 -22 0 0 0.2 0.2 {}
T {y} 7.5 -6.5 0 1 0.2 0.2 {}
T {a} -17.5 -6.5 0 0 0.2 0.2 {}
}
"
}

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@ -0,0 +1,27 @@
v {xschem version=3.1.0 file_version=1.2
}
G {}
K {}
V {}
S {}
E {}
N 500 -140 610 -140 {
lab=#net1}
N 500 -230 500 -170 {
lab=#net2}
N 390 -140 460 -140 {
lab=#net3}
N 500 -110 500 -50 {
lab=#net4}
N 790 -140 900 -140 {
lab=#net5}
N 790 -230 790 -170 {
lab=#net6}
N 680 -140 750 -140 {
lab=#net7}
N 790 -110 790 -50 {
lab=#net8}
C {nmosgen( @model )} 480 -140 0 0 {name=x1
model=nfet_g5v0d10v5}
C {nmosgen( @model )} 770 -140 0 0 {name=x2
model=nfet_g5v0d10v5}

View File

@ -69,11 +69,15 @@ N 840 -520 840 -460 {
lab=IN}
N 840 -460 920 -460 {
lab=IN}
C {symbolgen(inv)} 150 -460 0 0 {name=x1
N 470 -640 520 -640 {
lab=IN}
N 600 -640 660 -640 {
lab=IN_BUF3}
C {symbolgen(inv, @ROUT )} 150 -460 0 0 {name=x1
tclcommand="edit_file [abs_sym_path symbolgen]"
ROUT=1200}
C {lab_pin.sym} 30 -520 0 0 {name=p1 lab=IN}
C {symbolgen(buf,2)} 150 -560 0 0 {name=x3
C {symbolgen(buf, @ROUT )} 150 -560 0 0 {name=x3
tclcommand="edit_file [abs_sym_path symbolgen]"
ROUT=1200}
C {lab_pin.sym} 310 -560 0 1 {name=p2 lab=IN_BUF}
@ -112,3 +116,8 @@ C {lab_pin.sym} 840 -520 0 0 {name=p9 lab=IN}
C {parax_cap.sym} 1080 -550 0 0 {name=C3 gnd=0 value=100f m=1}
C {parax_cap.sym} 1080 -450 0 0 {name=C4 gnd=0 value=100f m=1}
C {noconn.sym} 840 -560 0 0 {name=l3}
C {symbolgen()} 560 -640 0 0 {name=x5
tclcommand="edit_file [abs_sym_path symbolgen]"
ROUT=1200}
C {lab_pin.sym} 470 -640 0 0 {name=p4 lab=IN}
C {lab_pin.sym} 660 -640 0 1 {name=p6 lab=IN_BUF3}