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tuning delta sigma adc example circuit

This commit is contained in:
Stefan Frederik 2022-02-16 12:51:58 +01:00
parent bdd64336ff
commit 841974d579
3 changed files with 25 additions and 3 deletions
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21
xschem_library/ngspice/adc.sch
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@ -4,6 +4,27 @@ K {}
V {}
S {}
E {}
B 2 1010 -1110 1810 -710 {flags=graph
y1=0
y2=2
ypos1=0
ypos2=2
divy=5
subdivy=1
unity=1
x1=1.24319e-06
x2=1.33458e-06
divx=5
subdivx=1
node="sig_in
x1.integ
vref
x1.q
x1.comp"
color="4 7 10 8 12"
dataset=0
unitx=u
}
P 4 5 670 -580 1650 -580 1650 -190 670 -190 670 -580 {dash=5}
P 5 5 10 -770 940 -770 940 -330 10 -330 10 -770 { dash=5}
T {Modulator} 500 -810 0 0 0.6 0.6 { layer=5}

3
xschem_library/ngspice/delta_sigma.sch
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File diff suppressed because one or more lines are too long

4
xschem_library/ngspice/opamp_65nm.sch
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@ -1,4 +1,4 @@
v {xschem version=2.9.9 file_version=1.2 }
v {xschem version=3.0.0 file_version=1.2 }
G {}
K {}
V {}
@ -68,7 +68,7 @@ C {nmos4.sym} 920 -220 0 0 {name=M7 model=nmos w=4u l=0.4u m=1}
C {lab_pin.sym} 940 -220 0 1 {name=p5 lab=0}
C {lab_pin.sym} 940 -170 0 1 {name=p8 lab=0}
C {res.sym} 880 -340 1 0 {name=R1
value=30k
value=5k
footprint=1206
device=resistor
m=1}