doc updates (developer info, file format spec)
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@ -244,9 +244,21 @@ V {assign #1500 LDOUT = LDIN +1;<br>
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E {}<br>
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S {}</kbd><br>
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in this case only the verilog-related global property has some definition. This is Verilog code that is copied into the output netlist.
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</p>
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<p class="important">
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Attribute strings for all Xschem objects are enclosed in curly braces.
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This allows attributes to span multiple lines.
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This component instance:<br>
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<kbd>C {capa.sym} 890 -160 0 0 {name=C4 m=1 value=10u device="tantalium capacitor"}</kbd><br>
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and this one:<br>
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<kbd>C {capa.sym} 890 -160 0 0 {name=C4<br>
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m=1 value=10u<br>
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device="tantalium capacitor"<br>
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}</kbd><br>
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are perfectly equivalent.
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</p>
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<h3>TEXT OBJECT</h3>
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<p>
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Example: <kbd>T {3 of 4 NANDS of a 74ls00} 500 -580 0 0 0.4 0.4 {font=Monospace layer=4}</kbd><br>
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