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port ordering for a schematic .subckt line will always be deduced from the symbol if it exists, even if the symbol type is not "subcircuit" (so it will be used for also "primitive" type symbols).

This commit is contained in:
stefan schippers 2024-08-24 08:21:08 +02:00
parent 652268c4d0
commit 4f0c3afa23
1 changed files with 2 additions and 2 deletions
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4
src/spice_netlist.c
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@ -349,9 +349,9 @@ int global_spice_netlist(int global) /* netlister driver */
dbg(1, "found top level symbol %s\n", top_symbol_name);
load_sym_def(top_symbol_name, NULL);
found_top_symbol = 1;
/* only use the symbol if it has pins and is a subcircuit */
if(xctx->sym[xctx->symbols - 1].type != NULL &&
!strcmp(xctx->sym[xctx->symbols - 1].type, "subcircuit") &&
/* only use the symbol if it has pins and is a subcircuit ? */
/* !strcmp(xctx->sym[xctx->symbols - 1].type, "subcircuit") && */
xctx->sym[xctx->symbols - 1].rects[PINLAYER] > 0) {
fprintf(fd," ");
print_spice_subckt_nodes(fd, xctx->symbols - 1);