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xschem
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Merge branch 'StefanSchippers:master' into master

This commit is contained in:
Chayan Deb 2025-01-20 23:23:04 +05:30 committed by GitHub
parent 320b8efc4b c9f60ce1c8
commit 4a5f31983b
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GPG Key ID: B5690EEEBB952194
8 changed files with 102 additions and 60 deletions
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25
src/actions.c
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@ -1797,6 +1797,7 @@ const char *get_sym_name(int inst, int ndir, int ext, int abs_path)
sch = tcl_hook2(str_replace(get_tok_value(xctx->inst[inst].prop_ptr,"schematic", 6), "@symname",
get_cell(xctx->inst[inst].name, 0), '\\', -1));
dbg(1, "get_sym_name(): sch=%s\n", sch);
if(xctx->tok_size) { /* token exists */
if(abs_path)
sym = abs_sym_path(sch, ".sym");
@ -1909,8 +1910,10 @@ void copy_symbol(xSymbol *dest_sym, xSymbol *src_sym)
void toggle_ignore(void)
{
int i, n, first = 1, remove = 0;
int i, n, first = 1;
char *attr;
int flag = 0; /* 1: spice_ignore=true, 2: spice_ignore=short */
const char *spice_ignore_str;
if(xctx->netlist_type == CAD_VERILOG_NETLIST) attr="verilog_ignore";
else if(xctx->netlist_type == CAD_VHDL_NETLIST) attr="vhdl_ignore";
else if(xctx->netlist_type == CAD_TEDAX_NETLIST) attr="tedax_ignore";
@ -1925,12 +1928,22 @@ void toggle_ignore(void)
xctx->push_undo();
first = 0;
}
remove = 0;
if(!strboolcmp(get_tok_value(xctx->inst[i].prop_ptr, attr, 0), "true")) remove = 1;
if(remove) {
my_strdup(_ALLOC_ID_, &xctx->inst[i].prop_ptr, subst_token(xctx->inst[i].prop_ptr, attr, NULL));
} else {
flag = 0;
spice_ignore_str = get_tok_value(xctx->inst[i].prop_ptr, attr, 0);
if(!strcmp(spice_ignore_str, "short")) flag = 2;
else if(!strboolcmp(spice_ignore_str, "true")) flag = 1;
if(flag == 0) flag = 1;
else if(flag == 1) flag = 2;
else flag = 0;
if(flag == 1) {
my_strdup(_ALLOC_ID_, &xctx->inst[i].prop_ptr, subst_token(xctx->inst[i].prop_ptr, attr, "true"));
} else if(flag == 2) {
my_strdup(_ALLOC_ID_, &xctx->inst[i].prop_ptr, subst_token(xctx->inst[i].prop_ptr, attr, "short"));
} else {
my_strdup(_ALLOC_ID_, &xctx->inst[i].prop_ptr, subst_token(xctx->inst[i].prop_ptr, attr, NULL));
}
set_inst_flags(&xctx->inst[i]);
set_modify(1);

2
src/psprint.c
View File

@ -906,7 +906,7 @@ static void ps_draw_symbol(int c, int n,int layer, int what, short tmp_flip, sho
"/Subtype /Link "
"/ANN pdfmark\n",
x1, y1, x2, y2,
sanitize(get_cell_w_ext(fname, 0)));
get_cell_w_ext(sanitize(fname), 0));
}
}
}

2
src/spice_netlist.c
View File

@ -653,7 +653,7 @@ int spice_block_netlist(FILE *fd, int i, int alert)
fprintf(fd, "%s\n", translated_sym_def);
my_free(_ALLOC_ID_, &sym_def);
} else {
const char *s = sanitize(get_cell(name, 0));
const char *s = get_cell(sanitize(name), 0);
fprintf(fd, "** sch_path: %s\n", sanitized_abs_sym_path(filename, ""));
fprintf(fd, ".subckt %s ", s);
print_spice_subckt_nodes(fd, i);

2
src/tedax_netlist.c
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@ -94,7 +94,7 @@ static int tedax_block_netlist(FILE *fd, int i, int alert)
else fprintf(fd, "## sym_path: %s\n", sanitized_abs_sym_path(xctx->sym[i].name, ""));
fprintf(fd, "## sch_path: %s\n", sanitized_abs_sym_path(filename, ""));
fprintf(fd, "begin netlist v1 %s\n",sanitize(get_cell(xctx->sym[i].name, 0)));
fprintf(fd, "begin netlist v1 %s\n",get_cell(sanitize(xctx->sym[i].name), 0));
print_tedax_subckt(fd, i);
my_strdup(_ALLOC_ID_, &extra, get_tok_value(xctx->sym[i].prop_ptr,"extra",0) );

11
src/token.c
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@ -116,13 +116,20 @@ const char *sanitize(const char *name)
{
static char *s = NULL;
static char *empty="";
if(!is_generator(name)) {
my_strdup2(_ALLOC_ID_, &s, name);
return s;
}
if(name == NULL) {
my_free(_ALLOC_ID_, &s);
return empty;
}
tclvareval("regsub -all { *[(),] *} {", name, "} _", NULL);
dbg(1, "sanitize(): name=%s\n", name);
tclvareval("regsub -all { *[.(),] *} {", name, "} _", NULL);
tclvareval("regsub {_$} {", tclresult(), "} {}", NULL);
my_strdup2(_ALLOC_ID_, &s, tclresult());
dbg(1, "sanitize(): s=%s\n", s);
return s;
}
@ -1632,7 +1639,7 @@ void print_generic(FILE *fd, char *ent_or_comp, int symbol)
my_strdup(_ALLOC_ID_, &generic_type, get_tok_value(xctx->sym[symbol].prop_ptr,"generic_type",0));
dbg(2, "print_generic(): symbol=%d template=%s \n", symbol, template);
fprintf(fd, "%s %s ",ent_or_comp, sanitize(get_cell(xctx->sym[symbol].name, 0)));
fprintf(fd, "%s %s ",ent_or_comp, get_cell(sanitize(xctx->sym[symbol].name), 0));
if(!strcmp(ent_or_comp,"entity"))
fprintf(fd, "is\n");
else

12
src/vhdl_netlist.c
View File

@ -297,8 +297,8 @@ int global_vhdl_netlist(int global, int alert) /* netlister driver */
fprintf(fd,"end %s ;\n\n", get_cell( xctx->sch[xctx->currsch], 0) );
fprintf(fd,"architecture arch_%s of %s is\n\n",
sanitize(get_cell( xctx->sch[xctx->currsch], 0)),
sanitize(get_cell( xctx->sch[xctx->currsch], 0)));
get_cell( sanitize(xctx->sch[xctx->currsch]), 0),
get_cell( sanitize(xctx->sch[xctx->currsch]), 0));
dbg(1, "global_vhdl_netlist(): printing top level used components\n");
/* print all components */
@ -615,12 +615,12 @@ int vhdl_block_netlist(FILE *fd, int i, int alert)
if(xctx->inst[l].prop_ptr) fprintf(fd, "%s\n", xctx->inst[l].prop_ptr);
}
}
fprintf(fd,"end %s ;\n\n", sanitize(get_cell(xctx->sym[i].name, 0)) );
fprintf(fd,"end %s ;\n\n", get_cell(sanitize(xctx->sym[i].name), 0) );
dbg(1, "vhdl_block_netlist(): architecture\n");
fprintf(fd,"architecture arch_%s of %s is\n\n",
sanitize(get_cell(xctx->sym[i].name, 0)),
sanitize(get_cell(xctx->sym[i].name, 0)) );
get_cell(sanitize(xctx->sym[i].name), 0),
get_cell(sanitize(xctx->sym[i].name), 0) );
/* get_cell( xctx->sch[xctx->currsch], 0), get_cell( xctx->sch[xctx->currsch], 0)); */
/* load current schematic to print used components */
@ -704,7 +704,7 @@ int vhdl_block_netlist(FILE *fd, int i, int alert)
}
if(xctx->schvhdlprop && xctx->schvhdlprop[0]) fprintf(fd, "%s\n", xctx->schvhdlprop);
fprintf(fd, "end arch_%s ;\n\n", sanitize(get_cell(xctx->sym[i].name, 0)) );
fprintf(fd, "end arch_%s ;\n\n", get_cell(sanitize(xctx->sym[i].name), 0) );
my_free(_ALLOC_ID_, &sig_type);
my_free(_ALLOC_ID_, &port_value);
my_free(_ALLOC_ID_, &type);

106
src/xschem.tcl
View File

@ -1817,6 +1817,7 @@ proc cellview_setlabels {w symbol derived_symbol} {
xschem remove_symbols ;# purge all symbols to force a reload from disk
xschem load -keep_symbols -nodraw -noundoreset $current
xschem netlist -keep_symbols -noalert;# traverse the hierarchy and retain all encountered symbols
puts "get netlist"
}
puts sym_sch=$sym_sch
puts default_sch=$default_sch
@ -1862,7 +1863,7 @@ proc cellview_edit_sym {w} {
xschem load_new_window $sym
}
proc cellview {{derived_symbols {}}} {
proc cellview { {derived_symbols {}} {upd 0} } {
global keep_symbols nolist_libs dark_gui_colorscheme
if {$dark_gui_colorscheme} {
@ -1882,29 +1883,42 @@ proc cellview {{derived_symbols {}}} {
} else {
set font fixed
}
toplevel .cv
xschem reload_symbols ;# purge unused symbols
xschem netlist -keep_symbols -noalert;# traverse the hierarchy and retain all encountered symbols
wm geometry .cv 800x200
update
raise .cv
frame .cv.top
label .cv.top.sym -text { SYMBOL} -width 30 -bg grey60 -anchor w -padx 4 -font $font
label .cv.top.sch -text SCHEMATIC -width 45 -bg grey60 -anchor w -padx 4 -font $font
label .cv.top.pad -text { } -width 4 -bg grey60 -font $font
pack .cv.top.sym .cv.top.sch -side left -fill x -expand 1
pack .cv.top.pad -side left -fill x
frame .cv.center
set sf [sframe .cv.center]
# puts sf=$sf
if {!$upd} {
xschem reload_symbols ;# purge unused symbols
xschem netlist -keep_symbols -noalert;# traverse the hierarchy and retain all encountered symbols
puts "get netlist"
catch {destroy .cv}
toplevel .cv
wm geometry .cv 800x200
update
raise .cv
frame .cv.top
label .cv.top.sym -text { SYMBOL} -width 30 -bg grey60 -anchor w -padx 4 -font $font
label .cv.top.sch -text SCHEMATIC -width 45 -bg grey60 -anchor w -padx 4 -font $font
label .cv.top.pad -text { } -width 4 -bg grey60 -font $font
pack .cv.top.sym .cv.top.sch -side left -fill x -expand 1
pack .cv.top.pad -side left -fill x
frame .cv.center
set sf [sframe .cv.center]
} else {
set sf .cv.center.f.scrl
}
set syms [join [lsort -index 1 [xschem symbols $derived_symbols]]]
foreach {i symbol} $syms {
set base_name [xschem symbol_base_name $symbol]
if { [catch {set base_name [xschem symbol_base_name $symbol]}] } {
set base_name $symbol
}
set derived_symbol 0
if {$base_name ne {}} {
set derived_symbol 1
}
set abs_sch [xschem get_sch_from_sym -1 $symbol]
if { [catch {set abs_sch [xschem get_sch_from_sym -1 $symbol]} ]} {
set abs_sch [abs_sym_path [add_ext $symbol .sch]]
}
if {$derived_symbol} {
set abs_sym [abs_sym_path $base_name]
} else {
@ -1922,28 +1936,32 @@ proc cellview {{derived_symbols {}}} {
set type [xschem getprop symbol $symbol type]
set sym_spice_sym_def [xschem getprop symbol $symbol spice_sym_def 2]
if {$type eq {subcircuit}} {
frame $sf.f$i
pack $sf.f$i -side top -fill x
label $sf.f$i.l -text $symbol -width 30 -anchor w -padx 4 -borderwidth 1 \
-relief sunken -pady 1 -font $font
if {$derived_symbol} {
$sf.f$i.l configure -fg $instfg
}
# puts $sf.f$i.s
entry $sf.f$i.s -width 45 -borderwidth 1 -relief sunken -font $font
button $sf.f$i.sym -text Sym -padx 4 -borderwidth 1 -pady 0 -font $font \
-command "cellview_edit_sym $sf.f$i.l"
button $sf.f$i.sch -text Sch -padx 4 -borderwidth 1 -pady 0 -font $font \
-command "cellview_edit_item $symbol $sf.f$i.s"
if {$sym_spice_sym_def eq {}} {
$sf.f$i.s insert 0 $sym_sch
} else {
if {$derived_symbol} {
$sf.f$i.s insert 0 {defined in instance spice_sym_def}
if {!$upd} {
frame $sf.f$i
pack $sf.f$i -side top -fill x
label $sf.f$i.l -text $symbol -width 30 -anchor w -padx 4 -borderwidth 1 \
-relief sunken -pady 1 -font $font
if {$derived_symbol} {
$sf.f$i.l configure -fg $instfg
}
# puts $sf.f$i.s
entry $sf.f$i.s -width 45 -borderwidth 1 -relief sunken -font $font
button $sf.f$i.sym -text Sym -padx 4 -borderwidth 1 -pady 0 -font $font \
-command "cellview_edit_sym $sf.f$i.l"
button $sf.f$i.sch -text Sch -padx 4 -borderwidth 1 -pady 0 -font $font \
-command "cellview_edit_item $symbol $sf.f$i.s"
if {$sym_spice_sym_def eq {}} {
$sf.f$i.s insert 0 $sym_sch
} else {
$sf.f$i.s insert 0 {defined in symbol spice_sym_def}
if {$derived_symbol} {
$sf.f$i.s insert 0 {defined in instance spice_sym_def}
} else {
$sf.f$i.s insert 0 {defined in symbol spice_sym_def}
}
}
}
if {[xschem is_generator [ $sf.f$i.s get]]} {
set f [ $sf.f$i.s get]
regsub {\(.*} $f {} f
@ -1959,15 +1977,19 @@ proc cellview {{derived_symbols {}}} {
}
balloon $sf.f$i.s $f
bind $sf.f$i.s <KeyRelease> "
cellview_setlabels %W [list $symbol] $derived_symbol
"
cellview_setlabels $sf.f$i.s $symbol $derived_symbol
pack $sf.f$i.l $sf.f$i.s -side left -fill x -expand 1
pack $sf.f$i.sch $sf.f$i.sym -side left
if {!$upd} {
pack $sf.f$i.l $sf.f$i.s -side left -fill x -expand 1
pack $sf.f$i.sch $sf.f$i.sym -side left
}
}
}
if {$upd} {return}
frame .cv.bottom
button .cv.bottom.update -text Update -command "cellview [list $derived_symbols] 1"
pack .cv.bottom.update -side left
label .cv.bottom.status -text {STATUS LINE}
pack .cv.bottom.status -fill x -expand yes
pack .cv.top -side top -fill x -expand no

2
xschem_library/ngspice/tb_diff_amp.sch
View File

@ -80,7 +80,7 @@ module diff_amp(
input electrical in2);
parameter real gain = 40; // setting gain to 40 of the differential amplifier
parameter real vcc = 3; // swing from -vcc to +vcc
parameter real vcc = 3; // swing from -vcc/2 to +vcc/2
parameter real offset = 3;// added offset
analog begin