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option for transparent background in svg export; added ngspice backannotation tutorial

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Stefan Frederik 2020-12-28 02:52:44 +01:00
parent 9e9cac0516
commit 41d9e17527
22 changed files with 2724 additions and 124 deletions
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172
doc/xschem_man/tutorial_ngspice_backannotation.html
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@ -19,11 +19,181 @@ p{padding: 15px 30px 10px;}
<!-- slide title -->
<h1> TUTORIAL: Backannotation of NGSPICE simulation operating<br>point data into an XSCHEM schematic</h1>
<p>
The objective of this tutorial is to show into the schematic the operating point data (voltages currents,
other electrical parameters) of a SPICE simulation done with the
<a href="https://sourceforge.net/projects/ngspice/">Ngspice</a> simulator.
This tutorial is based on the <kbd>cmos_example.sch</kbd> example schematic located in the <kbd>examples/</kbd>
directory. Start Xschem from a terminal since we need to give some commands in this tutorial.
</p>
<img style="box-shadow:none;" src="backannotation1.svg">
<h3> CONFIGURATION </H3>
<p>
Open your <kbd>xschemrc</kbd> file (usually <kbd>~/.xschem/xschemrc</kbd>), go to the end of the file,
Ensure the following tcl file is appended to the list of scripts loaded on startup by Xschem:
<pre class="code">
#### list of tcl files to preload.
lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl
</pre>
<h3> SETUP </H3>
<p>
Select the 'STIMULI' code block (click on it) and edit its attributes (press <kbd>q</kbd> or
<kbd>Shift-q</kbd>):
</p>
<pre class="code">
.temp 30
** models are generally not free: you must download
** SPICE models for active devices and put them into the below
** referenced file in netlist/simulation directory.
.include "models_cmos_example.txt"
.control
<span style="color: red;"> op </span>
<span style="color: red;"> save all </span>
<span style="color: red;"> write cmos_example.raw </span>
.endc
</pre>
<p>
The important parts are in red in above text. This ensures all variables are saved into the raw file.
These instructions are for an interactive ngspice run.<br>
When done open the <kbd>Simulation-&gt; Configure simulators and tools</kbd> dialog box and ensure the
<kbd>Ngspice</kbd> simulator is selected (not Ngspice batch). Also ensure the spice netlist mode is
selected (<kbd>Options -&gt; Spice netlist</kbd>).
</p>
<img src="backannotation2.png">
<h3> SIMULATION </H3>
<p>
If you now press the <kbd>Netlist</kbd> followed by the <kbd>Simulate</kbd> button simulation should complete
with no errors.
</p>
<img src="backannotation3.png">
<p>
You can close the simulator since we need only the <kbd>cmos_example.raw</kbd> file that is now saved
in the simulation directory (usually <kbd>~/.xschem/simulations/cmos_example.raw</kbd>).<br>
Now verify that xschem is able to read the raw file: issue this command in the xschem console:<br>
<kbd>ngspice::annotate</kbd>
</p>
<pre class="code">
xschem [~] ngspice::annotate
Raw file read ...
xschem [~]
</pre>
<p>
If there are no errors we are ready and set.
</p>
<img src="backannotation1.svg">
<h3> PUSH ANNOTATION METHOD </H3>
<p>
Start placing some probe elements into the schematic.
The first element is the <kbd>devices/spice_probe.sym</kbd> component. This must be attached to
some schematic wires to show the voltage value.
</p>
<img style="box-shadow:none;" src="backannotation4.svg">
<p>
Place some of these elements on various nets, issue the above mentioned <kbd>ngspice::annotate</kbd>
command and see the voltage values in the schematic.
</p>
<img style="box-shadow:none;" src="backannotation5.svg">
<p>
Another useful component is the <kbd>devices/ammeter.sym</kbd> one which allow to monitor branch currents.
Break some wires and insert this component as shown here:
</p>
<img style="box-shadow:none;" src="backannotation6.svg">
<p class="important">
IMPORTANT: When inserting current probes the circuit topology changes (new nodes are created) so you need to
re-create the netlist and re-run the simulation
</p><br>
<p>
Doing again the <kbd>ngspice::annotate</kbd> command after simulation will update the ammeters showing
the branch currents.
</p>
<img style="box-shadow:none;" src="backannotation7.svg">
<p>
These voltage and current values are inserted in the probe components as <b>attributes</b> and thus can be saved
to file. Remember that if you change the circuit the values shown in the probe elements are no longer valid,
you should update the values with a new simulation + annotate operation when done with the changes.<br><br>
What i have described so far is the simplest annotation procedure based on a <b>push</b> method: a tcl script
reads the simulation raw file and 'pushes' voltage and current values into the probe components as instance
attributes. If you do an edit attribute on one of these elements you see the attribute 'pushed' into it by the
annotate script. The advantage of this method is that values pushed into probes can be saved to file and are
thus persistent.
</p>
<img src="backannotation8.png">
<h3> PULL ANNOTATION METHOD </H3>
<p>
There is another annotation procedure that is based on a <b>pull</b> method: the probe objects have tcl commands
embedded that fetch simulation data from a table that has been read by the annotate script.
</p>
<p>
To ensure all currents are saved modify the <kbd>STIMULI</kbd> attributes as follows:
</p>
<pre class="code">
.temp 30
** models are generally not free: you must download
** SPICE models for active devices and put them into the below
** referenced file in netlist/simulation directory.
.include "models_cmos_example.txt"
.option savecurrents
.save all
.control
op
write cmos_example.raw
.endc
</pre>
<p>
Remove all previous probe elements and place some <kbd>devices/ngspice_probe.sym</kbd> components
and some <kbd>devices/ngspice_get_value.sym</kbd> components.
the ngspice_probe.sym is a simple voltage viewer and must be attached to a net. The ngspice_get_value.sym
displays a generic variable stored in the raw file. This symbol is usually placed next to the referenced
component, but does not need to be attached to any specific point or wire.
Edit its attributes and set its <kbd>node</kbd> attribute to an existing saved variable in the raw file.
</p>
<img src="backannotation9.png">
<p>
Run again the simulation and the <kbd>ngspice::annotate</kbd> command and values will be updated.
</p>
<img src="backannotation10.svg">
<p>
You can add additional variables in the raw file , for example modifying the .save instruction:<br>
<kbd>.save all @m4[gm] @m5[gm] @m1[gm]</kbd>
</p>
<img src="backannotation11.png">
<p>
Data annotated into the schematic using these components allows more simulation parameters to be viewed into
the schematic, not being restricted to currents and voltages. Since these components get data using a pull method
data is not persistent and not saved to file. After reloading the file just do a <kbd>ngspice::annotate</kbd>
to view data again.
</p>
<p>
There is one last probe component, the <kbd>devices/ngspice_get_expr.sym</kbd>. This is the most complex one, and
thus also the most flexible. It allows to insert a generic tcl expression using spice simulated data to report
more complex data. In the example below this component is used to display the electrical power of transistor m3,
calculated as <kbd>V(GN) * Id(m3)</kbd>.
</p>
<img src="backannotation12.png">
<p>
The example shown uses this component to display a (meaningless, but shows the usage) gm ratio of 2 transistors:
</p>
<img src="backannotation13.png">
<p>
The syntax is a bit clompex, considering the verbosity of TCL and the strange ngspice naming syntax, however
once a working one is created changing the expression is easy.
</p>
<p class="important">
To avoid the need of typing commands in the xschem console a launcher component <kbd>devices/launcher.sym</kbd>
can be placed with the tcl command for doing the annotation. Just do a <kbd>Ctrl-Click</kbd> on it to trigger
the annotation.
</p>
<img src="backannotation14.png">
<br>
<br>
<br>
<br>
<!-- end of slide -->
<div class="filler"></div>

1
src/globals.c
View File

@ -133,6 +133,7 @@ int rainbow_colors=0;
int dis_uniq_names=0; /* if set allow instances with duplicate names */
int persistent_command=0; /* remember last command 20181022 */
int color_ps=-1;
int transparent_svg=-1;
int only_probes=0;
int netlist_show=0;
int flat_netlist=0;

9
src/scheduler.c
View File

@ -717,6 +717,12 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
my_snprintf(s, S(s), "%d",TEXTLAYER);
Tcl_SetResult(interp, s,TCL_VOLATILE);
}
else if(!strcmp(argv[2],"transparent_svg")) {
if( transparent_svg != 0 )
Tcl_SetResult(interp, "1",TCL_STATIC);
else
Tcl_SetResult(interp, "0",TCL_STATIC);
}
else if(!strcmp(argv[2],"ui_state")) {
char s[30]; /* overflow safe 20161122 */
my_snprintf(s, S(s), "%d",xctx->ui_state);
@ -2221,6 +2227,9 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
else if(!strcmp(argv[2],"color_ps")) {
color_ps=atoi(argv[3]);
}
else if(!strcmp(argv[2],"transparent_svg")) {
transparent_svg=atoi(argv[3]);
}
else if(!strcmp(argv[2],"only_probes")) {
only_probes=atoi(argv[3]);
}

4
src/svgdraw.c
View File

@ -661,6 +661,10 @@ void svg_draw(void)
fprintf(fd, " stroke-linecap:round;\n");
fprintf(fd, " stroke-linejoin:round;\n");
fprintf(fd, " stroke-width: %g;\n", svg_linew);
if(i == 0 && transparent_svg) {
fprintf(fd, " fill-opacity: 0;\n");
fprintf(fd, " stroke-opacity: 0;\n");
}
fprintf(fd, "}\n");
}

6
src/xinit.c
View File

@ -1344,6 +1344,12 @@ int Tcl_AppInit(Tcl_Interp *inter)
my_snprintf(tmp, S(tmp), "%d",color_ps);
tclsetvar("color_ps",tmp);
}
if(transparent_svg==-1)
transparent_svg=atoi(tclgetvar("transparent_svg"));
else {
my_snprintf(tmp, S(tmp), "%d",transparent_svg);
tclsetvar("transparent_svg",tmp);
}
change_lw=atoi(tclgetvar("change_lw"));
l_width=atoi(tclgetvar("line_width"));
if(change_lw == 1) l_width = 0.0;

1
src/xschem.h
View File

@ -744,6 +744,7 @@ extern char hiersep[20];
extern int quit;
extern int show_erc;
extern int color_ps;
extern int transparent_svg;
extern int only_probes;
extern int pending_fullzoom;
extern int fullscreen;

5
src/xschem.tcl
View File

@ -3460,6 +3460,7 @@ set_ne flat_netlist 0
set_ne netlist_type vhdl
set_ne netlist_show 0
set_ne color_ps 0
set_ne transparent_svg 0
set_ne only_probes 0 ; # 20110112
set_ne fullscreen 0
set_ne unzoom_nodrift 1
@ -3741,6 +3742,10 @@ if { ( $::OS== "Windows" || [string length [lindex [array get env DISPLAY] 1] ]
-command {
if { $color_ps==1 } {xschem set color_ps 1} else { xschem set color_ps 0}
}
.menubar.option.menu add checkbutton -label "Transparent SVG background" -variable transparent_svg \
-command {
if { $transparent_svg==1 } {xschem set transparent_svg 1} else { xschem set transparent_svg 0}
}
.menubar.option.menu add checkbutton -label "Debug mode" -variable menu_tcl_debug \
-command {
if { $menu_tcl_debug==1 } {xschem debug 1} else { xschem debug 0}

224
xschem_library/examples/cmos_example.sch
View File

@ -5,140 +5,118 @@ V {}
S {}
E {}
T {CMOS DIFFERENTIAL AMPLIFIER
EXAMPLE} 810 -570 0 0 0.4 0.4 {}
N 30 -240 30 -210 {lab=VCC}
N 30 -240 60 -240 {lab=VCC}
N 240 -260 240 -210 {lab=GN}
N 240 -210 280 -210 {lab=GN}
N 280 -210 280 -180 {lab=GN}
N 280 -180 460 -180 {lab=GN}
N 500 -250 500 -210 {lab=#net1}
N 430 -280 450 -280 {lab=0}
N 550 -280 570 -280 {lab=0}
N 430 -250 570 -250 {lab=#net1}
N 370 -280 390 -280 {lab=PLUS}
N 610 -280 630 -280 {lab=MINUS}
N 570 -430 620 -430 {lab=VCC}
N 380 -430 430 -430 {lab=VCC}
N 470 -430 530 -430 {lab=G}
N 470 -430 470 -400 {lab=G}
N 430 -400 470 -400 {lab=G}
N 430 -400 430 -310 {lab=G}
N 570 -400 570 -310 {lab=DIFFOUT}
N 570 -500 570 -460 {lab=VCC}
N 430 -500 570 -500 {lab=VCC}
N 430 -500 430 -460 {lab=VCC}
N 500 -520 500 -500 {lab=VCC}
N 570 -360 830 -360 {lab=DIFFOUT}
N 30 -370 30 -340 {lab=PLUS}
N 30 -370 60 -370 {lab=PLUS}
N 30 -520 30 -490 {lab=MINUS}
N 30 -520 60 -520 {lab=MINUS}
N 500 -150 500 -120 {lab=0}
N 500 -150 520 -150 {lab=0}
N 520 -180 520 -150 {lab=0}
N 500 -180 520 -180 {lab=0}
N 240 -150 240 -120 {lab=0}
N 220 -150 240 -150 {lab=0}
N 220 -180 220 -150 {lab=0}
N 220 -180 240 -180 {lab=0}
C {lab_pin.sym} 750 -300 0 0 {name=p20 lab=0 net_name=true}
C {lab_pin.sym} 30 -150 0 0 {name=p17 lab=0 net_name=true}
EXAMPLE} 250 -650 0 0 0.4 0.4 {}
N 30 -310 30 -280 {lab=VCC}
N 30 -310 60 -310 {lab=VCC}
N 260 -240 260 -190 {lab=GN}
N 260 -190 300 -190 {lab=GN}
N 300 -190 300 -160 {lab=GN}
N 300 -160 530 -160 {lab=GN}
N 500 -290 520 -290 {lab=0}
N 670 -290 690 -290 {lab=0}
N 500 -260 690 -260 {lab=#net1}
N 440 -290 460 -290 {lab=PLUS}
N 730 -290 750 -290 {lab=MINUS}
N 690 -490 740 -490 {lab=VCC}
N 450 -490 500 -490 {lab=VCC}
N 540 -490 650 -490 {lab=G}
N 540 -490 540 -460 {lab=G}
N 500 -460 540 -460 {lab=G}
N 690 -560 690 -520 {lab=VCC}
N 500 -560 690 -560 {lab=VCC}
N 500 -560 500 -520 {lab=VCC}
N 570 -580 570 -560 {lab=VCC}
N 690 -420 830 -420 {lab=DIFFOUT}
N 30 -440 30 -410 {lab=PLUS}
N 30 -440 60 -440 {lab=PLUS}
N 30 -590 30 -560 {lab=MINUS}
N 30 -590 60 -590 {lab=MINUS}
N 570 -130 570 -100 {lab=0}
N 570 -130 590 -130 {lab=0}
N 590 -160 590 -130 {lab=0}
N 570 -160 590 -160 {lab=0}
N 260 -130 260 -100 {lab=0}
N 240 -130 260 -130 {lab=0}
N 240 -160 240 -130 {lab=0}
N 240 -160 260 -160 {lab=0}
N 690 -460 690 -380 { lab=DIFFOUT}
N 500 -460 500 -380 { lab=G}
N 570 -260 570 -250 { lab=#net1}
N 690 -380 690 -320 { lab=DIFFOUT}
N 500 -380 500 -320 { lab=G}
N 570 -250 570 -190 { lab=#net1}
C {lab_pin.sym} 750 -360 0 0 {name=p20 lab=0 net_name=true}
C {lab_pin.sym} 30 -220 0 0 {name=p17 lab=0 net_name=true}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {nmos4.sym} 480 -180 0 0 {name=m1 model=cmosn w=5u l=2u m=1 net_name=true}
C {pmos4.sym} 550 -430 0 0 {name=m2 model=cmosp w=5u l=2u m=1 net_name=true}
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5 net_name=true}
C {lab_pin.sym} 500 -120 0 0 {name=p1 lab=0 net_name=true}
C {lab_pin.sym} 60 -240 0 1 {name=p2 lab=VCC net_name=true}
C {nmos4.sym} 260 -180 0 1 {name=m3 model=cmosn w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 240 -120 0 0 {name=p3 lab=0 net_name=true}
C {isource.sym} 240 -290 0 0 {name=IBIAS value=100u net_name=true}
C {lab_pin.sym} 240 -320 0 0 {name=p4 lab=0 net_name=true}
C {nmos4.sym} 410 -280 0 0 {name=m4 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 450 -280 0 1 {name=p5 lab=0 net_name=true}
C {nmos4.sym} 590 -280 0 1 {name=m5 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 550 -280 0 0 {name=p0 lab=0 net_name=true}
C {lab_pin.sym} 620 -430 0 1 {name=p6 lab=VCC net_name=true}
C {pmos4.sym} 450 -430 0 1 {name=m6 model=cmosp w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 380 -430 0 0 {name=p7 lab=VCC net_name=true}
C {lab_pin.sym} 500 -520 0 0 {name=p8 lab=VCC net_name=true}
C {lab_pin.sym} 370 -280 0 0 {name=p9 lab=PLUS net_name=true}
C {lab_pin.sym} 630 -280 0 1 {name=p10 lab=MINUS net_name=true}
C {lab_pin.sym} 830 -360 0 1 {name=p11 lab=DIFFOUT net_name=true}
C {lab_pin.sym} 240 -230 0 0 {name=p13 lab=GN net_name=true}
C {lab_pin.sym} 30 -280 0 0 {name=p14 lab=0 net_name=true}
C {vsource.sym} 30 -310 0 0 {name=VPLUS value="2.5 pwl 0 2.4 10n 2.4 10.1n 2.6" net_name=true}
C {lab_pin.sym} 60 -370 0 1 {name=p15 lab=PLUS net_name=true}
C {lab_pin.sym} 30 -430 0 0 {name=p16 lab=0 net_name=true}
C {vsource.sym} 30 -460 0 0 {name=V1 value=2.5 net_name=true}
C {lab_pin.sym} 60 -520 0 1 {name=p18 lab=MINUS net_name=true}
C {capa.sym} 750 -330 0 0 {name=CL
C {nmos4.sym} 550 -160 0 0 {name=m1 model=cmosn w=5u l=2u m=1 net_name=true}
C {pmos4.sym} 670 -490 0 0 {name=m2 model=cmosp w=5u l=2u m=1 net_name=true}
C {vsource.sym} 30 -250 0 0 {name=VVCC value=5 net_name=true}
C {lab_pin.sym} 570 -100 0 0 {name=p1 lab=0 net_name=true}
C {lab_pin.sym} 60 -310 0 1 {name=p2 lab=VCC net_name=true}
C {nmos4.sym} 280 -160 0 1 {name=m3 model=cmosn w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 260 -100 0 0 {name=p3 lab=0 net_name=true}
C {isource.sym} 260 -270 0 0 {name=IBIAS value=100u net_name=true}
C {lab_pin.sym} 260 -300 0 0 {name=p4 lab=0 net_name=true}
C {nmos4.sym} 480 -290 0 0 {name=m4 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 520 -290 0 1 {name=p5 lab=0 net_name=true}
C {nmos4.sym} 710 -290 0 1 {name=m5 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 670 -290 0 0 {name=p0 lab=0 net_name=true}
C {lab_pin.sym} 740 -490 0 1 {name=p6 lab=VCC net_name=true}
C {pmos4.sym} 520 -490 0 1 {name=m6 model=cmosp w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 450 -490 0 0 {name=p7 lab=VCC net_name=true}
C {lab_pin.sym} 570 -580 0 0 {name=p8 lab=VCC net_name=true}
C {lab_pin.sym} 440 -290 0 0 {name=p9 lab=PLUS net_name=true}
C {lab_pin.sym} 750 -290 0 1 {name=p10 lab=MINUS net_name=true}
C {lab_pin.sym} 830 -420 0 1 {name=p11 lab=DIFFOUT net_name=true}
C {lab_pin.sym} 260 -210 0 0 {name=p13 lab=GN net_name=true}
C {lab_pin.sym} 30 -350 0 0 {name=p14 lab=0 net_name=true}
C {vsource.sym} 30 -380 0 0 {name=VPLUS value="2.5 pwl 0 2.4 10n 2.4 10.1n 2.6" net_name=true}
C {lab_pin.sym} 60 -440 0 1 {name=p15 lab=PLUS net_name=true}
C {lab_pin.sym} 30 -500 0 0 {name=p16 lab=0 net_name=true}
C {vsource.sym} 30 -530 0 0 {name=V1 value=2.5 net_name=true}
C {lab_pin.sym} 60 -590 0 1 {name=p18 lab=MINUS net_name=true}
C {capa.sym} 750 -390 0 0 {name=CL
m=1
value=2p
footprint=1206
device="ceramic capacitor" net_name=true}
C {code.sym} 870 -190 0 0 {name=STIMULI
C {code.sym} 900 -190 0 0 {name=STIMULI
only_toplevel=true
value="
** ngspice
.temp 30
** xyce
* .step temp list 30
** ngspice
* .save all
value=".temp 30
** models are generally not free: you must download
** SPICE models for active devices and put them into the below
** SPICE models for active devices and put them into the below
** referenced file in netlist/simulation directory.
.option savecurrents
.include \\"models_cmos_example.txt\\"
.option savecurrents
.save all @m4[gm] @m5[gm] @m1[gm]
.control
let cap = 2e-12
set filetype=binary
while cap <= 20e-12
alter CL cap
tran 0.8n 2000n
op
write cmos_example.raw
set appendwrite
let cap = cap + 2e-12
end
* op
write cmos_example.raw
plot all.diffout
.endc
** ngspice
* .save all
** xyce, not needed if -r given om cmdline
* .print tran format=raw v(diffout) v(plus) v(minus)
" net_name=true}
C {ngspice_probe.sym} 430 -350 0 0 {name=r1}
C {ngspice_probe.sym} 480 -430 0 0 {name=r2}
C {ngspice_probe.sym} 550 -500 0 0 {name=r3}
C {ngspice_probe.sym} 620 -360 0 0 {name=r4}
C {ngspice_probe.sym} 330 -180 0 0 {name=r5}
C {ngspice_probe.sym} 30 -370 0 0 {name=r6}
C {ngspice_probe.sym} 30 -240 0 0 {name=r7}
C {ngspice_probe.sym} 30 -520 0 0 {name=r8}
C {ngspice_probe.sym} 500 -210 0 0 {name=r9}
C {ngspice_get_value.sym} 410 -440 0 1 {name=r11 node=i(@m6[id])}
C {ngspice_get_expr.sym} 590 -450 0 0 {name=r18
node="[ngspice::get_current \{m2[id]\}]"
descr = Id
}
C {lab_pin.sym} 430 -370 0 0 {name=p12 lab=G net_name=true}
C {ngspice_get_expr.sym} 550 -450 0 1 {name=r10
node="[format %.4g [expr [ngspice::get_voltage vcc] - [ngspice::get_voltage g]]]"
descr = Vsg
}
C {ngspice_get_expr.sym} 530 -170 0 0 {name=r14
node="[ngspice::get_current \{m1[id]\}]"
descr = Id
}
C {ngspice_get_expr.sym} 210 -170 0 1 {name=r12
node="[ngspice::get_current \{m3[id]\}]"
descr = Id
}
C {lab_pin.sym} 500 -430 0 0 {name=p12 lab=G net_name=true}
C {launcher.sym} 700 -60 0 0 {name=h1
descr=Backannotate
tclcommand="ngspice::annotate"}
C {ngspice_probe.sym} 700 -420 0 0 {name=r3}
C {ngspice_get_value.sym} 510 -320 0 0 {name=r2 node=i(@m4[id])}
C {launcher.sym} 700 -110 0 0 {name=h2
descr="View raw file"
tclcommand="textwindow $netlist_dir/cmos_example.raw"}
C {ngspice_get_value.sym} 680 -320 0 1 {name=r1 node=i(@m5[id])}
C {ngspice_get_value.sym} 550 -190 0 1 {name=r4 node=i(@m1[id])}
C {ngspice_probe.sym} 500 -400 0 0 {name=r5}
C {ngspice_probe.sym} 350 -160 0 0 {name=r6}
C {ngspice_probe.sym} 630 -560 0 0 {name=r7}
C {ngspice_get_value.sym} 720 -310 0 0 {name=r8 node=@m5[gm]}
C {ngspice_get_value.sym} 470 -310 0 1 {name=r9 node=@m4[gm]}
C {ngspice_get_value.sym} 580 -190 0 0 {name=r10 node=@m1[gm]}
C {ngspice_get_expr.sym} 210 -140 0 1 {name=r11
node="[format %.4g [expr ([ngspice::get_voltage GN]) * [ngspice::get_current \{m3[id]\}]]] W"
descr = power
}
C {ngspice_get_expr.sym} 650 -160 0 0 {name=r12
node="[expr [ngspice::get_node \{@m5[gm]\}] / [ngspice::get_node \{@m1[gm]\}]]"
descr = "gm ratio m5/m1"
}