update verilogA example tb_diff_amp.sch

This commit is contained in:
stefan schippers 2025-02-11 20:38:17 +01:00
parent 2eeeebf715
commit 2a7a461ace
3 changed files with 20 additions and 28 deletions

View File

@ -1174,18 +1174,11 @@ static int source_tcl_file(char *s)
if(Tcl_EvalFile(interp, s)==TCL_ERROR) {
fprintf(errfp, "Tcl_AppInit() error: can not execute %s, please fix:\n", s);
fprintf(errfp, "%s", tclresult());
#if TCL_MAJOR_VERSION >= 8 && TCL_MINOR_VERSION >=6
fprintf(errfp, "Line No: %d\n", Tcl_GetErrorLine(interp));
#endif
fprintf(errfp, "%s", tclresult());
fprintf(errfp, "\n");
#if TCL_MAJOR_VERSION >= 8 && TCL_MINOR_VERSION >=6
my_snprintf(tmp, S(tmp), "tk_messageBox -icon error -type ok -message \
{Tcl_AppInit() err 1: can not execute %s, please fix:\n%s\nLine No: %d\n}",

View File

@ -21,21 +21,21 @@ v {xschem version=3.4.6 file_version=1.2
}
G {}
K {type=opamp_va
format="@name @@OUT @@IN1 @@IN2 @model"
format="@name @@OUT @@IN1 @@IN2 @model gain=@gain amplitude=@amplitude offset=@offset"
template="name=X1 model=diff_amp_cell"
template="name=X1 model=diff_amp_cell gain=40 amplitude=3 offset=1.5"
device_model="tcleval(
.subckt diff_amp_cell OUT IN1 IN2
N1 out in1 in2 diff_amp_model
.ends diff_amp_cell
.model diff_amp_model diff_amp
.control
* following line specifies the location for the .osdi file so ngspice can use it.
pre_osdi $USER_CONF_DIR/xschem_library/diff_amp.osdi
.endc
.model diff_amp_model diff_amp $ gain=40 amplitude=3 offset=1.5
.subckt diff_amp_cell OUT IN1 IN2 gain=40 amplitude=3 offset=1.5
N1 out in1 in2 diff_amp_model gain=gain amplitude=amplitude offset=offset
.ends diff_amp_cell
)"
}
V {}

View File

@ -25,8 +25,8 @@ V {}
S {}
E {}
B 2 840 -580 1640 -170 {flags=graph
y1=0
y2=6
y1=6.3e-14
y2=5
ypos1=0
ypos2=2
divy=5
@ -49,7 +49,7 @@ logy=0
}
B 2 840 -990 1640 -580 {flags=graph
y1=0
y2=40
y2=100
ypos1=0
ypos2=2
divy=5
@ -68,10 +68,9 @@ unitx=1
logx=0
logy=0
}
P 4 5 140 -600 140 -880 710 -880 710 -600 140 -600 {}
P 4 5 30 -600 30 -880 740 -880 740 -600 30 -600 {}
P 4 7 410 -600 410 -560 420 -560 410 -540 400 -560 410 -560 410 -600 {}
T {// importing libs
`include "discipline.h"
module diff_amp(
@ -79,17 +78,17 @@ module diff_amp(
input electrical in1,
input electrical in2);
parameter real gain = 40; // setting gain to 40 of the differential amplifier
parameter real vcc = 3; // swing from -vcc/2 to +vcc/2
parameter real offset = 3;// added offset
(* desc="gain", units="", type="instance" *) parameter real gain = 40 from [-inf: inf];
(* desc="amplitude", units="", type="instance" *) parameter real amplitude = 3 from [-inf: inf];
(* desc="offset", units="", type="instance" *) parameter real offset = 1.5 from [-inf: inf];
analog begin
V(out) <+ offset / 2 + vcc / 2 * tanh( gain / vcc * 2 * V(in1, in2));
V(out) <+ offset + amplitude / 2 * tanh( gain / amplitude * 2 * V(in1, in2));
end
endmodule
} 150 -870 0 0 0.2 0.2 {font=monospace}
} 40 -870 0 0 0.2 0.2 {font=monospace}
T {create a diff_amp.va file with following code
and compile it into a .osdi file with openvaf.} 190 -940 0 0 0.4 0.4 {}
N 180 -450 320 -450 {lab=B}
@ -100,7 +99,6 @@ N 180 -330 180 -290 {lab=0}
N 80 -330 80 -290 {lab=0}
N 80 -530 80 -390 {lab=A}
N 180 -450 180 -390 {lab=B}
C {diff_amp.sym} 420 -490 0 0 {name=X1}
C {lab_pin.sym} 640 -490 0 1 {name=p1 sig_type=std_logic lab=Z}
C {lab_pin.sym} 80 -530 0 0 {name=p2 sig_type=std_logic lab=A}
C {lab_pin.sym} 180 -450 0 0 {name=p3 sig_type=std_logic lab=B}
@ -118,7 +116,7 @@ C {code_shown.sym} 240 -320 0 0 {name=COMMANDS only_toplevel=false value="
set appendwrite
remzerovec
write tb_diff_amp.raw
quit 0
* quit 0
.endc
"}
C {launcher.sym} 670 -120 0 0 {name=h5
@ -130,3 +128,4 @@ C {launcher.sym} 670 -170 0 0 {name=h1
descr="OP annotate"
tclcommand="xschem annotate_op"
}
C {diff_amp.sym} 420 -490 0 0 {name=X1 model=diff_amp_cell gain=100 amplitude=5 offset=2.5}