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update simulator_commands.sym and simulator_commands_shown.sym to handle wrong simulator names (no `?` in netlist)

This commit is contained in:
stefan schippers 2024-07-13 10:38:32 +02:00
parent d444673b88
commit 26d8dbf644
2 changed files with 12 additions and 8 deletions
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10
xschem_library/devices/simulator_commands.sym
View File

@ -1,4 +1,4 @@
v {xschem version=3.4.4 file_version=1.2 v {xschem version=3.4.5 file_version=1.2
* *
* This file is part of XSCHEM, * This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@ -29,10 +29,12 @@ value=\\"
\\"" \\""
format="tcleval( format="tcleval(
[if \{[ sim_is_@simulator ]\} \{ return \{ [if \{[catch \{sim_is_@simulator \} retval] \} \{
return \{\} \} elseif \{$retval\} \{ return \{
\\\\@value \\\\@value
\}\}] \}
)" \} else \{ return \{\} \}
])"
} }
V {} V {}
S {} S {}

10
xschem_library/devices/simulator_commands_shown.sym
View File

@ -1,4 +1,4 @@
v {xschem version=3.4.4 file_version=1.2 v {xschem version=3.4.5 file_version=1.2
* *
* This file is part of XSCHEM, * This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@ -29,10 +29,12 @@ value=\\"
\\"" \\""
format="tcleval( format="tcleval(
[if \{[ sim_is_@simulator ]\} \{ return \{ [if \{[catch \{sim_is_@simulator \} retval] \} \{
return \{\} \} elseif \{$retval\} \{ return \{
\\\\@value \\\\@value
\}\}] \}
)"} \} else \{ return \{\} \}
])"}
V {} V {}
S {} S {}
E {} E {}