num parameter to logic_set() to perform "num" toggling operations

This commit is contained in:
Stefan Frederik 2020-12-28 20:20:45 +01:00
parent 78da56aec5
commit 17d8db59ff
7 changed files with 313 additions and 292 deletions

View File

@ -1077,9 +1077,10 @@ int callback(int event, int mx, int my, KeySym key,
place_net_label(1);
break;
}
if(key >= '0' && key <= '2' && state == 0) { /* Toggle pin logic level */
if(key >= '0' && key <= '3' && state == 0) { /* Toggle pin logic level */
if(xctx->semaphore >= 2) break;
logic_set(key - '0');
if(key == '3') logic_set(-1, 1);
else logic_set(key - '0', 1);
break;
}
if(key=='L' && state == (Mod1Mask | ShiftMask)) { /* add pin label*/

View File

@ -967,7 +967,7 @@ void propagate_logic()
int found /* , mult */;
xSymbol *symbol;
xRect *rct;
int i, j, npin;
int i, j, npin, nloops=0;
char *propagate_str = NULL;
int propagate;
struct hilight_hashentry *entry;
@ -1053,42 +1053,56 @@ void propagate_logic()
my_free(1222, &propagated_net);
}
void logic_set(int value)
void logic_set(int value, int num)
{
int i, n, newvalue;
int i, j, n, newval;
char *type;
xRect boundbox;
int big = xctx->wires> 2000 || xctx->instances > 2000 ;
static int map[] = {LOGIC_0, LOGIC_1, LOGIC_X};
struct hilight_hashentry *entry;
prepare_netlist_structs(0);
rebuild_selected_array();
newval = value;
if(!no_draw && !big) {
calc_drawing_bbox(&boundbox, 2);
bbox(START, 0.0 , 0.0 , 0.0 , 0.0);
bbox(ADD, boundbox.x1, boundbox.y1, boundbox.x2, boundbox.y2);
}
for(i=0;i<xctx->lastsel;i++)
{
n = xctx->sel_array[i].n;
switch(xctx->sel_array[i].type) {
case WIRE:
newvalue = value; /* next logic value 0, 1, 2 (LOGIC_X) */
bus_hilight_lookup(xctx->wire[n].node, map[newvalue], XINSERT);
break;
case ELEMENT:
type = (xctx->inst[n].ptr+ xctx->sym)->type;
if( type && xctx->inst[n].node && IS_LABEL_SH_OR_PIN(type) ) { /* instance must have a pin! */
newvalue = value; /* next logic value 0, 1, 2 (LOGIC_X) */
bus_hilight_lookup(xctx->inst[n].node[0], map[newvalue], XINSERT);
}
break;
default:
break;
for(j = 0; j < num; j++) {
for(i=0;i<xctx->lastsel;i++)
{
n = xctx->sel_array[i].n;
switch(xctx->sel_array[i].type) {
case WIRE:
if(value == -1) {
entry = bus_hilight_lookup(xctx->wire[n].node, 0, XLOOKUP);
if(entry)
newval = (entry->value == LOGIC_1) ? 0 : (entry->value == LOGIC_0) ? 1 : 2;
else newval = 2;
}
bus_hilight_lookup(xctx->wire[n].node, map[newval], XINSERT);
break;
case ELEMENT:
type = (xctx->inst[n].ptr+ xctx->sym)->type;
if( type && xctx->inst[n].node && IS_LABEL_SH_OR_PIN(type) ) { /* instance must have a pin! */
if(value == -1) {
entry = bus_hilight_lookup(xctx->inst[n].node[0], 0, XLOOKUP);
if(entry)
newval = (entry->value == LOGIC_1) ? 0 : (entry->value == LOGIC_0) ? 1 : 2;
else newval = 2;
}
bus_hilight_lookup(xctx->inst[n].node[0], map[newval], XINSERT);
}
break;
default:
break;
}
}
propagate_logic();
propagate_hilights(1, 0, XINSERT);
}
propagate_logic();
propagate_hilights(1, 0, XINSERT);
if(!no_draw && !big) {
calc_drawing_bbox(&boundbox, 2);
bbox(ADD, boundbox.x1, boundbox.y1, boundbox.x2, boundbox.y2);

View File

@ -1433,8 +1433,14 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
}
else if(!strcmp(argv[1],"logic_set"))
{
int num = 1;
cmd_found = 1;
if(argc > 2) logic_set(atoi(argv[2]));
if(argc > 3 ) num = atoi(argv[3]);
if(argc > 2) {
int n = atoi(argv[2]);
if(n == 3) n = -1;
logic_set(n, num);
}
Tcl_ResetResult(interp);
}
}

View File

@ -1111,7 +1111,7 @@ extern void print_verilog_signals(FILE *fd);
extern void print_generic(FILE *fd, char *ent_or_comp, int symbol);
extern void print_verilog_param(FILE *fd, int symbol);
extern void hilight_net(int to_waveform);
extern void logic_set(int v);
extern void logic_set(int v, int num);
extern int hilight_netname(const char *name);
extern void unhilight_net();
extern void propagate_hilights(int set, int clear, int mode);

View File

@ -7,4 +7,4 @@ V {}
S {}
E {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {@text} -7.5 -8.125 0 1 2 2 {}
T {@text} -7.5 31.875 0 1 2 2 {}

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@ -7,4 +7,4 @@ V {}
S {}
E {}
B 5 -0.3125 29.6875 0.3125 30.3125 {name=p dir=in}
P 19 9 0 30 -30 0 -530 0 -560 30 -560 50 -530 80 -30 80 0 50 0 30 {fill=true}
P 1 9 0 30 -30 0 -530 0 -560 30 -560 50 -530 80 -30 80 0 50 0 30 {fill=true}

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@ -11,7 +11,19 @@ L 4 100 -1470 100 -1390 {}
L 4 200 -1470 200 -1390 {}
L 4 100 -1570 100 -1490 {}
L 4 200 -1570 200 -1490 {}
B 12 3210 -2700 3930 -1400 {}
B 12 3920 -2840 4640 -1540 {}
T {7 Segment Display driver
and base-10 counter} 1540 -3130 0 0 2.5 2.5 {}
T {This example shows Xschem (very simple) simulation abilities
Ctrl-Click to start simulation.
Xschem will be only partially responsive during simulation.
Will run for 40 iterations.
If you need to stop:
Simulation -> Forced stop tcl scripts} 1730 -750 0 0 1.5 1.5 {}
T {Cyan: Uninitialized or unknown (X)} 3210 -1190 0 0 1.5 1.5 {layer=1}
T {Signal colors:} 3130 -1290 0 0 1.5 1.5 {}
T {Blue: Logic level low (0)} 3210 -1090 0 0 1.5 1.5 {layer=12}
T {Red: Logic level high (1)} 3210 -990 0 0 1.5 1.5 {layer=5}
T {
0 1 2 3 4 5 6
======================
@ -40,8 +52,6 @@ T {3} 140 -1530 0 0 0.8 0.8 {}
T {6} 140 -1430 0 0 0.8 0.8 {}
T {4} 90 -1450 0 1 0.8 0.8 {}
T {5} 210 -1450 0 0 0.8 0.8 {}
T {7 Segment Display driver
and base-10 counter} 1540 -3130 0 0 2.5 2.5 {}
T {Segment 0} 1190 -2880 0 0 1 1 { layer=4}
T {Segment 1} 1190 -2400 0 0 1 1 { layer=4}
T {Segment 2} 1190 -1920 0 0 1 1 { layer=4}
@ -49,259 +59,305 @@ T {Segment 3} 1190 -1520 0 0 1 1 { layer=4}
T {Segment 4} 1190 -960 0 0 1 1 { layer=4}
T {Segment 5} 1190 -560 0 0 1 1 { layer=4}
T {Segment 6} 1190 -240 0 0 1 1 { layer=4}
T {This example shows Xschem (very simple) simulation abilities
Ctrl-Click to start simulation.
Xschem will be only partially responsive during simulation.
Will run for 40 iterations.
If you need to stop:
Simulation -> Forced stop tcl scripts} 1730 -750 0 0 1.5 1.5 {}
T {Truth Table} 10 -1730 0 0 1.5 1.5 {layer=4}
T {Cyan: Uninitialized or unknown (X)} 3210 -1190 0 0 1.5 1.5 {layer=1}
T {Signal colors:} 3130 -1290 0 0 1.5 1.5 {}
T {Blue: Logic level low (0)} 3210 -1090 0 0 1.5 1.5 {layer=12}
T {Red: Logic level high (1)} 3210 -990 0 0 1.5 1.5 {layer=5}
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N 630 -1080 880 -1080 { lab=#net12}
N 680 -1040 880 -1040 { lab=B[1]}
N 790 -1000 880 -1000 { lab=#net10}
N 1000 -1060 1020 -1060 { lab=#net24}
N 550 -960 880 -960 { lab=#net8}
N 790 -1000 880 -1000 { lab=#net13}
N 1000 -1060 1020 -1060 { lab=#net27}
N 550 -960 880 -960 { lab=#net11}
N 600 -920 880 -920 { lab=B[2]}
N 680 -880 880 -880 { lab=B[1]}
N 790 -840 880 -840 { lab=#net10}
N 1000 -900 1020 -900 { lab=#net25}
N 790 -840 880 -840 { lab=#net13}
N 1000 -900 1020 -900 { lab=#net28}
N 520 -800 880 -800 { lab=B[3]}
N 630 -760 880 -760 { lab=#net9}
N 710 -720 880 -720 { lab=#net11}
N 790 -680 880 -680 { lab=#net10}
N 1000 -740 1050 -740 { lab=#net26}
N 1050 -920 1050 -740 { lab=#net26}
N 1050 -1220 1050 -1040 { lab=#net23}
N 1020 -1000 1050 -1000 { lab=#net24}
N 1020 -1060 1020 -1000 { lab=#net24}
N 1020 -960 1050 -960 { lab=#net25}
N 1020 -960 1020 -900 { lab=#net25}
N 630 -760 880 -760 { lab=#net12}
N 710 -720 880 -720 { lab=#net14}
N 790 -680 880 -680 { lab=#net13}
N 1000 -740 1050 -740 { lab=#net29}
N 1050 -920 1050 -740 { lab=#net29}
N 1050 -1220 1050 -1040 { lab=#net26}
N 1020 -1000 1050 -1000 { lab=#net27}
N 1020 -1060 1020 -1000 { lab=#net27}
N 1020 -960 1050 -960 { lab=#net28}
N 1020 -960 1020 -900 { lab=#net28}
N 1170 -980 1230 -980 { lab=S[4]}
N 550 -480 880 -480 { lab=#net8}
N 630 -440 880 -440 { lab=#net9}
N 710 -400 880 -400 { lab=#net11}
N 550 -480 880 -480 { lab=#net11}
N 630 -440 880 -440 { lab=#net12}
N 710 -400 880 -400 { lab=#net14}
N 760 -360 880 -360 { lab=B[0]}
N 1000 -420 1050 -420 { lab=#net27}
N 550 -320 880 -320 { lab=#net8}
N 1000 -420 1050 -420 { lab=#net30}
N 550 -320 880 -320 { lab=#net11}
N 600 -280 880 -280 { lab=B[2]}
N 710 -240 880 -240 { lab=#net11}
N 1000 -260 1050 -260 { lab=#net28}
N 550 -160 880 -160 { lab=#net8}
N 710 -240 880 -240 { lab=#net14}
N 1000 -260 1050 -260 { lab=#net31}
N 550 -160 880 -160 { lab=#net11}
N 600 -120 880 -120 { lab=B[2]}
N 680 -80 880 -80 { lab=B[1]}
N 760 -40 880 -40 { lab=B[0]}
N 1000 -100 1050 -100 { lab=#net29}
N 1050 -420 1050 -300 { lab=#net27}
N 1050 -220 1050 -100 { lab=#net29}
N 790 -200 880 -200 { lab=#net10}
N 1000 -100 1050 -100 { lab=#net32}
N 1050 -420 1050 -300 { lab=#net30}
N 1050 -220 1050 -100 { lab=#net32}
N 790 -200 880 -200 { lab=#net13}
N 1170 -260 1230 -260 { lab=S[6]}
N 2020 -1770 2060 -1770 { lab=#net30}
N 2340 -2440 2440 -2440 { lab=#net31}
N 2070 -2460 2220 -2460 { lab=BNEXT[3]}
N 2070 -2460 2070 -2440 { lab=BNEXT[3]}
N 1920 -2440 2070 -2440 { lab=BNEXT[3]}
N 2340 -2260 2440 -2260 { lab=#net32}
N 2070 -2280 2220 -2280 { lab=BNEXT[2]}
N 2070 -2280 2070 -2260 { lab=BNEXT[2]}
N 1920 -2260 2070 -2260 { lab=BNEXT[2]}
N 2340 -2080 2440 -2080 { lab=#net33}
N 2070 -2100 2220 -2100 { lab=BNEXT[1]}
N 2070 -2100 2070 -2080 { lab=BNEXT[1]}
N 1920 -2080 2070 -2080 { lab=BNEXT[1]}
N 2340 -1900 2440 -1900 { lab=#net34}
N 2070 -1920 2220 -1920 { lab=BNEXT[0]}
N 2070 -1920 2070 -1900 { lab=BNEXT[0]}
N 1920 -1900 2070 -1900 { lab=BNEXT[0]}
N 2060 -1770 2160 -1770 { lab=#net30}
N 2160 -2420 2160 -1770 { lab=#net30}
N 2160 -2420 2220 -2420 { lab=#net30}
N 2160 -2240 2220 -2240 { lab=#net30}
N 2160 -2060 2220 -2060 { lab=#net30}
N 2160 -1880 2220 -1880 { lab=#net30}
N 1760 -1010 1890 -1010 { lab=CLK}
N 1760 -1180 1890 -1180 { lab=CLEAR_}
N 3260 -2470 3430 -2470 { lab=CLK}
N 3260 -2290 3430 -2290 { lab=CLK}
N 3260 -2110 3430 -2110 { lab=CLK}
N 2600 -1360 3320 -1360 { lab=CLEAR_}
N 2600 -1360 2600 -1180 { lab=CLEAR_}
N 1900 -1180 2600 -1180 { lab=CLEAR_}
N 3320 -2610 3430 -2610 { lab=CLEAR_}
N 3320 -2610 3320 -1360 { lab=CLEAR_}
N 3320 -2430 3430 -2430 { lab=CLEAR_}
N 3320 -2250 3430 -2250 { lab=CLEAR_}
N 3320 -2070 3430 -2070 { lab=CLEAR_}
C {title.sym} 1350 -50 0 0 {name=l38 author="Stefan Schippers"}
C {fa_1.sym} 1860 -2480 0 0 {name=x28 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {fa_1.sym} 1860 -2300 0 0 {name=x33 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {fa_1.sym} 1860 -2120 0 0 {name=x34 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {fa_1.sym} 1860 -1940 0 0 {name=x35 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {dfrtp_1.sym} 2530 -2440 0 0 {name=x36 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 2440 -2460 0 0 {name=l32 sig_type=std_logic lab=CLK}
C {lab_pin.sym} 2440 -2420 0 0 {name=l33 sig_type=std_logic lab=CLEAR_}
C {lab_pin.sym} 2700 -2460 0 1 {name=l34 sig_type=std_logic lab=B[3]}
C {dfrtp_1.sym} 2530 -2260 0 0 {name=x37 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 2440 -2280 0 0 {name=l35 sig_type=std_logic lab=CLK}
C {lab_pin.sym} 2440 -2240 0 0 {name=l36 sig_type=std_logic lab=CLEAR_}
C {lab_pin.sym} 2700 -2280 0 1 {name=l37 sig_type=std_logic lab=B[2]}
C {dfrtp_1.sym} 2530 -2080 0 0 {name=x53 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 2440 -2100 0 0 {name=l39 sig_type=std_logic lab=CLK}
C {lab_pin.sym} 2440 -2060 0 0 {name=l40 sig_type=std_logic lab=CLEAR_}
C {lab_pin.sym} 2700 -2100 0 1 {name=l41 sig_type=std_logic lab=B[1]}
C {dfrtp_1.sym} 2530 -1900 0 0 {name=x54 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 2440 -1920 0 0 {name=l42 sig_type=std_logic lab=CLK}
C {lab_pin.sym} 2440 -1880 0 0 {name=l43 sig_type=std_logic lab=CLEAR_}
C {lab_pin.sym} 2700 -1920 0 1 {name=l44 sig_type=std_logic lab=B[0]}
C {inv_2.sym} 1630 -1990 0 0 {name=x55 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 1590 -1990 0 0 {name=l45 sig_type=std_logic lab=CLEAR_}
C {noconn.sym} 1940 -2520 0 1 {name=l46}
C {nand4_1.sym} 1960 -1770 0 0 {name=x56 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {inv_2.sym} 1790 -1790 0 0 {name=x57 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {inv_2.sym} 1790 -1710 0 0 {name=x58 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {fa_1.sym} 2280 -2670 0 0 {name=x28 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {fa_1.sym} 2280 -2490 0 0 {name=x33 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {fa_1.sym} 2280 -2310 0 0 {name=x34 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {fa_1.sym} 2280 -2130 0 0 {name=x35 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {dfrtp_1.sym} 3520 -2630 0 0 {name=x36 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 3690 -2650 0 1 {name=l34 sig_type=std_logic lab=B[3]}
C {dfrtp_1.sym} 3520 -2450 0 0 {name=x37 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 3690 -2470 0 1 {name=l37 sig_type=std_logic lab=B[2]}
C {dfrtp_1.sym} 3520 -2270 0 0 {name=x53 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 3690 -2290 0 1 {name=l41 sig_type=std_logic lab=B[1]}
C {dfrtp_1.sym} 3520 -2090 0 0 {name=x54 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 3690 -2110 0 1 {name=l44 sig_type=std_logic lab=B[0]}
C {inv_2.sym} 2050 -2180 0 0 {name=x55 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 2010 -2180 0 0 {name=l45 sig_type=std_logic lab=CLEAR_}
C {noconn.sym} 2360 -2710 0 1 {name=l46}
C {and2_1.sym} 2700 -2630 0 0 {name=x59 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {and2_1.sym} 2700 -2450 0 0 {name=x60 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {and2_1.sym} 2700 -2270 0 0 {name=x61 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {and2_1.sym} 2700 -2090 0 0 {name=x62 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 2490 -2650 0 0 {name=l51 sig_type=std_logic lab=BNEXT[3]}
C {lab_pin.sym} 2490 -2470 0 0 {name=l52 sig_type=std_logic lab=BNEXT[2]}
C {lab_pin.sym} 2490 -2290 0 0 {name=l53 sig_type=std_logic lab=BNEXT[1]}
C {lab_pin.sym} 2490 -2110 0 0 {name=l54 sig_type=std_logic lab=BNEXT[0]}
C {launcher.sym} 1840 -130 0 0 {name=h3
descr="START SIMULATION"
comment="
This launcher Starts a simple interactive simulation of the LFSR
"
tclcommand=" set count 0
set duration 1000
xschem select instance p8 ;# CLEAR_
xschem select instance p9 ;# CLK
xschem logic_set 0 ;# reset pulse (active low)
update ;# allow event loop to come in (update screen, user input etc)
after $duration
xschem select instance p9 clear ;# release CLK
xschem logic_set 1
xschem select instance p8 clear ;# release CLEAR_
xschem select instance p9 ;# CLK
update ;# allow event loop to come in (update screen, user input etc)
set logic_value 0
while \{1\} \{
update ;# allow event loop to come in (update screen, user input etc)
incr count
if \{$count>100 || $tclstop == 1\} break
puts \\"simulating: loop $count\\"
xschem logic_set $logic_value
after $duration
set logic_value [expr !$logic_value]
set duration [expr int($duration/1.05)]
\}
"
}
C {inv_2.sym} 2620 -1960 0 0 {name=x1 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {giant_label.sym} 2040 -1430 0 1 {name=l1 sig_type=std_logic lab=CLK text=CLK}
C {giant_label.sym} 2660 -1960 0 1 {name=l3 sig_type=std_logic lab=R text="RESET
COUNTER"}
C {giant_label.sym} 1900 -1180 0 1 {name=l4 sig_type=std_logic lab=CLEAR_ text="CLEAR (active low)"}
C {segment.sym} 4560 -2230 0 0 {name=l6 sig_type=std_logic lab=S[3]}
C {segment.sym} 4030 -2200 1 0 {name=l2 sig_type=std_logic lab=S[1]}
C {segment.sym} 4530 -2200 3 1 {name=l5 sig_type=std_logic lab=S[2]}
C {segment.sym} 4560 -2810 0 0 {name=l7 sig_type=std_logic lab=S[0]}
C {segment.sym} 4530 -2180 3 0 {name=l8 sig_type=std_logic lab=S[5]}
C {segment.sym} 4030 -2180 1 1 {name=l9 sig_type=std_logic lab=S[4]}
C {segment.sym} 4000 -1570 2 0 {name=l10 sig_type=std_logic lab=S[6]}
C {ipin.sym} 1900 -1180 0 0 {name=p8 sig_type=std_logic lab=CLEAR_}
C {ipin.sym} 1910 -1430 0 0 {name=p9 sig_type=std_logic lab=CLK}
C {o21ai_1.sym} 2400 -1960 0 0 {name=x2 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 2290 -1920 0 0 {name=l11 sig_type=std_logic lab=BNEXT[3]}
C {lab_pin.sym} 2290 -2000 0 0 {name=l12 sig_type=std_logic lab=BNEXT[2]}
C {lab_pin.sym} 2290 -1960 0 0 {name=l13 sig_type=std_logic lab=BNEXT[1]}
C {inv_2.sym} 550 -3100 3 1 {name=x22 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 520 -3160 0 0 {name=l19 sig_type=std_logic lab=B[3]}
C {inv_2.sym} 630 -3100 3 1 {name=x23 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
@ -342,59 +398,3 @@ C {nand4_1.sym} 940 -260 0 0 {name=x30 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefi
C {nand4_1.sym} 940 -100 0 0 {name=x31 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {and3_1.sym} 1110 -260 0 0 {name=x32 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 1230 -260 0 1 {name=p7 lab=S[6]}
C {and2_1.sym} 2280 -2440 0 0 {name=x59 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {and2_1.sym} 2280 -2260 0 0 {name=x60 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {and2_1.sym} 2280 -2080 0 0 {name=x61 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {and2_1.sym} 2280 -1900 0 0 {name=x62 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {lab_pin.sym} 2070 -2460 0 0 {name=l51 sig_type=std_logic lab=BNEXT[3]}
C {lab_pin.sym} 2070 -2280 0 0 {name=l52 sig_type=std_logic lab=BNEXT[2]}
C {lab_pin.sym} 2070 -2100 0 0 {name=l53 sig_type=std_logic lab=BNEXT[1]}
C {lab_pin.sym} 2070 -1920 0 0 {name=l54 sig_type=std_logic lab=BNEXT[0]}
C {lab_pin.sym} 1730 -1830 0 0 {name=l55 sig_type=std_logic lab=BNEXT[3]}
C {lab_pin.sym} 1730 -1790 0 0 {name=l56 sig_type=std_logic lab=BNEXT[2]}
C {lab_pin.sym} 1730 -1750 0 0 {name=l57 sig_type=std_logic lab=BNEXT[1]}
C {lab_pin.sym} 1730 -1710 0 0 {name=l58 sig_type=std_logic lab=BNEXT[0]}
C {launcher.sym} 1840 -130 0 0 {name=h3
descr="START SIMULATION"
comment="
This launcher Starts a simple interactive simulation of the LFSR
"
tclcommand=" set count 0
set duration 1000
xschem select instance p8 ;# CLEAR_
xschem select instance p9 ;# CLK
xschem logic_set 0 ;# reset pulse (active low)
update ;# allow event loop to come in (update screen, user input etc)
after $duration
xschem select instance p9 clear ;# release CLK
xschem logic_set 1
xschem select instance p8 clear ;# release CLEAR_
xschem select instance p9 ;# CLK
update ;# allow event loop to come in (update screen, user input etc)
set logic_value 0
while \{1\} \{
update ;# allow event loop to come in (update screen, user input etc)
incr count
if \{$count>100 || $tclstop == 1\} break
puts \\"simulating: loop $count\\"
xschem logic_set $logic_value
after $duration
set logic_value [expr !$logic_value]
set duration [expr int($duration/1.05)]
\}
"
}
C {inv_2.sym} 2200 -1770 0 0 {name=x1 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
C {giant_label.sym} 1890 -1010 0 1 {name=l1 sig_type=std_logic lab=CLK text=CLK}
C {giant_label.sym} 2240 -1770 0 1 {name=l3 sig_type=std_logic lab=R text="RESET
COUNTER"}
C {giant_label.sym} 1890 -1180 0 1 {name=l4 sig_type=std_logic lab=CLEAR_ text="CLEAR (active low)"}
C {segment.sym} 3850 -2090 0 0 {name=l6 sig_type=std_logic lab=S[3]}
C {segment.sym} 3320 -2060 1 0 {name=l2 sig_type=std_logic lab=S[1]}
C {segment.sym} 3820 -2060 3 1 {name=l5 sig_type=std_logic lab=S[2]}
C {segment.sym} 3850 -2670 0 0 {name=l7 sig_type=std_logic lab=S[0]}
C {segment.sym} 3820 -2040 3 0 {name=l8 sig_type=std_logic lab=S[5]}
C {segment.sym} 3320 -2040 1 1 {name=l9 sig_type=std_logic lab=S[4]}
C {segment.sym} 3290 -1430 2 0 {name=l10 sig_type=std_logic lab=S[6]}
C {ipin.sym} 1760 -1180 0 0 {name=p8 sig_type=std_logic lab=CLEAR_}
C {ipin.sym} 1760 -1010 0 0 {name=p9 sig_type=std_logic lab=CLK}