update tb_counter_wrapper.sch
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@ -5,7 +5,7 @@ V {}
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S {}
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F {}
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E {}
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B 2 20 -770 1060 -430 {flags=graph
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B 2 40 -890 1080 -550 {flags=graph
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y1=0
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y2=2
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ypos1=0.12703394
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@ -13,8 +13,8 @@ ypos2=1.7910429
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divy=5
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subdivy=1
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unity=1
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x1=-3.9199067e-07
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x2=1.9268808e-05
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x1=7.3755098e-15
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x2=4e-05
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divx=5
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subdivx=1
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xlabmag=1.0
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@ -33,19 +33,46 @@ unitx=1
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logx=0
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logy=0
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digital=1}
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B 2 40 -1220 1080 -890 {flags=graph
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y1=0
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y2=0.43
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ypos1=0
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ypos2=2
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divy=5
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subdivy=1
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unity=1
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x1=7.3755098e-15
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x2=4e-05
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divx=5
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subdivx=1
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xlabmag=1.0
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ylabmag=1.0
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dataset=-1
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unitx=1
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logx=0
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logy=0
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color=4
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node=i(vamm)
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hilight_wave=-1}
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T {These capacitors are used to force
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auto-creation of dac bridges
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(digital count_out --> analog count_out).
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Analog nodes can be plotted and saved
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in raw file.} 800 -230 0 0 0.3 0.3 {layer=7}
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N 50 -110 50 -90 {lab=CLK}
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N 440 -310 570 -310 {lab=CLK}
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N 710 -310 840 -310 {bus=1 lab=count_out[3..0]}
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N 800 -310 800 -270 {lab=count_out[3..0]}
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C {vsource.sym} 50 -60 0 0 {name=VCLOCK value="pulse 0 'VCC' 500n 10n 10n 490n 1u"}
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C {lab_pin.sym} 50 -30 0 0 {name=p6 lab=0}
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C {lab_pin.sym} 50 -110 0 0 {name=p13 lab=CLK}
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C {code_shown.sym} 20 -370 0 0 {name=COMMANDS only_toplevel=false value="
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in raw file.} 880 -400 0 0 0.3 0.3 {layer=7}
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N 70 -230 70 -210 {lab=CLK}
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N 410 -430 460 -430 {lab=CLK}
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N 600 -430 860 -430 {bus=1 lab=count_out[3..0]}
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N 820 -430 820 -390 {lab=count_out[3..0]}
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N 1210 -150 1210 -130 {lab=SUM}
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N 790 -150 1210 -150 {lab=SUM}
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N 790 -240 790 -210 {lab=count_out3}
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N 910 -240 910 -210 {lab=count_out2}
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N 1030 -240 1030 -210 {lab=count_out1}
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N 1150 -240 1150 -210 {lab=count_out0}
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C {vsource.sym} 70 -180 0 0 {name=VCLOCK value="pulse 0 'VCC' 500n 10n 10n 490n 1u"}
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C {lab_pin.sym} 70 -150 0 0 {name=p6 lab=0}
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C {lab_pin.sym} 70 -230 0 0 {name=p13 lab=CLK}
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C {code_shown.sym} 40 -490 0 0 {name=COMMANDS only_toplevel=false value="
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.param VCC=1.8
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.control
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@ -55,13 +82,13 @@ C {code_shown.sym} 20 -370 0 0 {name=COMMANDS only_toplevel=false value="
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write tb_counter_wrapper.raw
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.endc
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"}
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C {launcher.sym} 460 -390 0 0 {name=h5
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C {launcher.sym} 480 -510 0 0 {name=h5
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descr="load waves"
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tclcommand="xschem raw_read $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw tran"
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}
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C {lab_pin.sym} 440 -310 0 0 {name=p3 lab=CLK}
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C {lab_pin.sym} 840 -310 0 1 {name=p4 lab=count_out[3..0]}
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C {counter.sym} 640 -310 0 0 {name=a1 model=counter
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C {lab_pin.sym} 410 -430 0 0 {name=p3 lab=CLK}
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C {lab_pin.sym} 860 -430 0 1 {name=p4 lab=count_out[3..0]}
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C {counter.sym} 530 -430 0 0 {name=a1 model=counter
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**** put an asteric or any other character before (and no spaces in between)
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**** the model you DON'T want to use:
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@ -73,11 +100,39 @@ C {counter.sym} 640 -310 0 0 {name=a1 model=counter
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device_model=".model counter d_cosim simulation=\\"ivlng\\" sim_args=[\\"counter\\"]"
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tclcommand="edit_file counter.v"}
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C {parax_cap.sym} 800 -260 0 0 {name=C2[3..0] gnd=0 value=1f m=1}
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C {launcher.sym} 870 -400 0 0 {name=h3
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C {parax_cap.sym} 820 -380 0 0 {name=C2[3..0] gnd=0 value=1f m=1}
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C {launcher.sym} 890 -490 0 0 {name=h3
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descr="Verilate Design"
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tclcommand="execute 1 sh -c \\"cd $netlist_dir; ngspice vlnggen [abs_sym_path counter.v]\\""}
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C {launcher.sym} 870 -360 0 0 {name=h1
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C {launcher.sym} 890 -530 0 0 {name=h1
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descr="Icarusate Design"
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tclcommand="execute 1 sh -c \\"cd $netlist_dir; iverilog -o counter [abs_sym_path counter.v]\\""
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}
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C {ammeter.sym} 1210 -100 0 0 {name=VAMM savecurrent=0 spice_ignore=0}
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C {lab_pin.sym} 1210 -70 0 0 {name=p35 lab=0}
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C {res.sym} 790 -180 0 0 {name=R4
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value=8
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 790 -240 0 0 {name=p44 lab=count_out3}
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C {res.sym} 910 -180 0 0 {name=R5
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value=16
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 910 -240 0 0 {name=p45 lab=count_out2}
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C {res.sym} 1030 -180 0 0 {name=R6
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value=32
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 1030 -240 0 0 {name=p46 lab=count_out1}
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C {res.sym} 1150 -180 0 0 {name=R7
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value=64
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footprint=1206
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device=resistor
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m=1}
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C {lab_pin.sym} 1150 -240 0 0 {name=p47 lab=count_out0}
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C {lab_pin.sym} 1210 -150 0 1 {name=p48 lab=SUM}
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C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
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