verilator/test_regress/t/t_trace_split_struct_fst.out

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$date
Tue Mar 31 17:23:31 2026
$end
$version
Generated by VerilatedFst
$end
$timescale
1ps
$end
$scope module top $end
$var wire 1 ! clk $end
$var wire 1 " clk2 $end
$scope module $unit $end
$var bit 1 # global_bit $end
$upscope $end
$scope module t $end
$var wire 1 ! clk $end
$var wire 1 " clk2 $end
$var integer 32 $ cyc [31:0] $end
$attrbegin pack packed members 2 $end
$scope struct v_strp $end
$var bit 1 % b1 $end
$var bit 1 & b0 $end
$upscope $end
$attrbegin pack packed members 2 $end
$scope struct v_strp2 $end
$var bit 1 ' b1 $end
$var bit 1 ( b0 $end
$upscope $end
$var logic 1 ) foo $end
$attrbegin array unpacked bounds -30064771072 $end
$scope sv_array unpacked_array $end
$var logic 8 * unpacked_array[-7] [7:0] $end
$var logic 8 + unpacked_array[-6] [7:0] $end
$var logic 8 , unpacked_array[-5] [7:0] $end
$var logic 8 - unpacked_array[-4] [7:0] $end
$var logic 8 . unpacked_array[-3] [7:0] $end
$var logic 8 / unpacked_array[-2] [7:0] $end
$var logic 8 0 unpacked_array[-1] [7:0] $end
$var logic 8 1 unpacked_array[0] [7:0] $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
b00000000 1
b00000000 0
b00000000 /
b00000000 .
b00000000 -
b00000000 ,
b00000000 +
b00000000 *
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0(
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0&
0%
b00000000000000000000000000000000 $
0#
0"
0!
$end
#10
1!
b00000000000000000000000000000001 $
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#20
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b00000000000000000000000000000010 $
1&
#25
0!
#30
1!
0&
b00000000000000000000000000000011 $
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b00000001 1
#35
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#40
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b00000000000000000000000000000100 $
1&
#45
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#50
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0&
b00000000000000000000000000000101 $
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b00000010 1
1(
#55
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#60
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b00000000000000000000000000000110 $
1&