45 lines
1.5 KiB
Systemverilog
45 lines
1.5 KiB
Systemverilog
// DESCRIPTION: Verilator: Reproducer for issue #7411.
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//
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// when V3Param widths a pin value against the port dtype the widthing must not
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// edit any referenced template vars in place. A dependent localparam like
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// dirs_lp = dims_p*2+1 must still recompute from the overridden dims_p on
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// each specialization. (basically - don't poison the template)
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//
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// This program is free software; you can redistribute it and/or modify it
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// under the terms of either the GNU Lesser General Public License Version 3
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// or the Perl Artistic License Version 2.0.
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// SPDX-FileCopyrightText: 2026 Wilson Snyder
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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module sub #(
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parameter int dims_p = 2,
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parameter int dirs_lp = dims_p*2 + 1,
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parameter bit [1:0][dirs_lp-1:0][dirs_lp-1:0] matrix_p = '0
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) ();
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endmodule
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module t;
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localparam bit [1:0][4:0][4:0] big_matrix = '1;
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localparam bit [1:0][2:0][2:0] small_matrix = '1;
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// First instance processes matrix_p with the template's default dims_p=2.
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// Before the fix, this froze dirs_lp on the template at 5.
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sub #(.matrix_p(big_matrix)) s1 ();
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// Second instance overrides dims_p=1, so dirs_lp must recompute to 3.
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sub #(.dims_p(1), .matrix_p(small_matrix)) s2 ();
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initial begin
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if (s1.dirs_lp !== 5) begin
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$write("%%Error: s1.dirs_lp=%0d expected 5\n", s1.dirs_lp);
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$stop;
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end
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if (s2.dirs_lp !== 3) begin
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$write("%%Error: s2.dirs_lp=%0d expected 3\n", s2.dirs_lp);
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$stop;
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end
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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