116 lines
1.6 KiB
Plaintext
116 lines
1.6 KiB
Plaintext
$version Generated by VerilatedVcd $end
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$timescale 1ps $end
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$scope module top $end
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$var wire 1 " clk $end
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$scope module t $end
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$var wire 1 " clk $end
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$var wire 8 # in0 [7:0] $end
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$var wire 8 $ in1 [7:0] $end
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$var wire 8 % out0 [7:0] $end
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$var wire 8 & out1 [7:0] $end
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$var wire 32 ' count [31:0] $end
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$scope module i_sub0 $end
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$var wire 1 ( clk $end
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$var wire 8 ) in [7:0] $end
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$var wire 8 * out [7:0] $end
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$var wire 8 + ff [7:0] $end
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$upscope $end
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$scope module i_sub1 $end
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$var wire 1 , clk $end
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$var wire 8 - in [7:0] $end
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$var wire 8 . out [7:0] $end
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$var wire 8 / ff [7:0] $end
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$upscope $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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0"
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b00010100 #
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b01100100 $
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b00000000 %
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b00000000 &
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b00000000000000000000000000000000 '
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0(
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b00010100 )
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b00000000 *
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b00000000 +
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0,
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b01100100 -
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b00000000 .
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b00000000 /
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#10
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1"
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b00010101 #
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b01100110 $
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b00010101 %
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b01100110 &
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b00000000000000000000000000000001 '
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1(
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b00010101 )
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b00010101 *
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b00010101 +
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1,
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b01100110 -
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b01100110 .
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b01100110 /
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#15
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0"
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0(
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0,
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#20
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1"
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b00010110 #
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b01101000 $
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b00010110 %
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b01101000 &
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b00000000000000000000000000000010 '
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1(
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b00010110 )
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b00010110 *
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b00010110 +
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1,
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b01101000 -
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b01101000 .
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b01101000 /
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#25
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0"
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0(
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0,
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#30
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1"
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b00010111 #
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b01101010 $
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b00010111 %
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b01101010 &
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b00000000000000000000000000000011 '
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1(
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b00010111 )
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b00010111 *
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b00010111 +
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1,
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b01101010 -
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b01101010 .
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b01101010 /
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#35
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0"
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0(
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0,
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#40
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1"
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b00011000 #
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b01101100 $
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b00011000 %
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b01101100 &
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b00000000000000000000000000000100 '
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1(
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b00011000 )
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b00011000 *
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b00011000 +
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1,
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b01101100 -
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b01101100 .
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b01101100 /
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