verilator/test_regress/t/t_interconnect.out

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%Error-UNSUPPORTED: t/t_interconnect.v:12:3: Unsupported: interconnect
12 | interconnect a;
| ^~~~~~~~~~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_interconnect.v:13:3: Unsupported: interconnect
13 | interconnect b;
| ^~~~~~~~~~~~
%Error-UNSUPPORTED: t/t_interconnect.v:21:12: Unsupported: interconnect
21 | output interconnect a,
| ^~~~~~~~~~~~
%Error-UNSUPPORTED: t/t_interconnect.v:22:12: Unsupported: interconnect
22 | output interconnect b);
| ^~~~~~~~~~~~
%Error: Exiting due to