11 lines
625 B
Plaintext
11 lines
625 B
Plaintext
%Error: t/t_clocking_zero_delay_bad.v:15:17: Cycle delays not allowed as intra-assignment delays (IEEE 1800-2023 14.11)
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: ... note: In instance 'has_clocking'
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15 | always out <= ##0 1;
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| ^~
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... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
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%Error: t/t_clocking_zero_delay_bad.v:20:11: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
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: ... note: In instance 'no_clocking'
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20 | initial ##0;
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| ^~
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%Error: Exiting due to
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