mirror of
https://github.com/verilator/verilator.git
synced 2026-10-06 10:03:44 +02:00
Geza Lore
1c4c6c9e9d
Various cleanups, simplifications and improvements:
- Build the output bottom up, eliminating AstSplitPlaceholder
- Replace the 'ignore step' pruning with removing the vertices and edges
- Treat an NBA written variable as a block input, enabling more splits
- Move instead of clone leaf statements
Overall V3Split is faster, uses less memory, can do more splits, is
simpler algorithmically, and has half the lines of code in V3Split
Most notably this can now be split, which could not be before:
```systemverilog
always @(posedge clk) begin
a <= !a;
if (a) b <= c;
end
```
t_x_rand_mt_stability* pin $random values, but there is one random seed
per C thread, so they depend on which thread runs the block. More
splitting moved that block onto a different thread, so force a single
MTask in those tests to keep them stable.
Some property/assert test changed hit counts due to races, but are now
closer to what might be expected.
19 lines
575 B
Python
Executable File
19 lines
575 B
Python
Executable File
#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2024 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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test.compile(verilator_flags2=["--binary -fno-reorder -fno-split"])
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test.execute(expect_filename=test.golden_filename)
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test.passes()
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