mirror of
https://github.com/verilator/verilator.git
synced 2026-08-29 17:28:46 +02:00
Introduce a new DfgPrev vertex, representing the value of a variable before any in-graph assignments. This can be used to break all remaining cycles in the graph, so all Dfgs become acyclic after V3DfgBreakCycles. The circular dataflow is still represented, and is taken care of by the scheduler, it is just the DfgGraph that represents the logic that becomes acyclic. This makes V3DfgBreakCycles a mandatory transform, so drop the disabling -fno-dfg-break-cycles option (still parsed, but has no effect). Note the effect of this is small, as most cycles can be fixed up by driver tracing, which is unchanged, but this is required for some upcoming work.
.. SPDX-FileCopyrightText: 2003-2026 Wilson Snyder SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 Verilator Documentation ======================= This folder contains sources for Verilator documentation. For formatted documentation see: - `Verilator README <https://github.com/verilator/verilator>`_ - `Verilator installation and package directory structure <https://verilator.org/install>`_ - `Verilator manual (HTML) <https://verilator.org/verilator_doc.html>`_, or `Verilator manual (PDF) <https://verilator.org/verilator_doc.pdf>`_ - `Subscribe to Verilator announcements <https://github.com/verilator/verilator-announce>`_ - `Verilator forum <https://verilator.org/forum>`_ - `Verilator issues <https://verilator.org/issues>`_