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29 lines
455 B
Systemverilog
29 lines
455 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2022 Antmicro Ltd
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// SPDX-License-Identifier: CC0-1.0
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class Cls #(
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type PARAMB
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);
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endclass
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class ClsTT #(type A, type B);
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endclass
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class ClsVT #(int N, type T);
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endclass
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class ClsTV #(type T, int N);
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endclass
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module t;
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Cls c; // Missing type param
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ClsTT tt;
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ClsVT vt;
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ClsTV tv;
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endmodule
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