verilator/test_regress
Geza Lore ece4d71e5b
Optimize CReset in Dfg (#7737)
Teach DFG about CReset. This is not so much to optimize CReset itself, but to enable synthesizing logic involving CReset, which does appear with automatic variables used only in certain branches
2026-06-08 17:01:50 +01:00
..
t Optimize CReset in Dfg (#7737) 2026-06-08 17:01:50 +01:00
.gdbinit
.gitignore
CMakeLists.txt Remove multi-threaded FST tracing (#7443) 2026-04-19 16:02:12 +01:00
Makefile Test: Remove old Makefile rules 2026-04-13 21:09:09 -04:00
Makefile_obj
driver.py Apply 'make format' 2026-06-02 20:47:02 +00:00
input.vc
input.xsim.vc