12 lines
296 B
Systemverilog
12 lines
296 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2017 Wilson Snyder
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// SPDX-License-Identifier: CC0-1.0
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// verilog_format: off
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`ifndef COMMON_GUARD
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`define COMMON_GUARD 1
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Inside `__FILE__.
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`endif
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