14 lines
367 B
Systemverilog
14 lines
367 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2010 Wilson Snyder
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// SPDX-License-Identifier: CC0-1.0
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module t_lint_declfilename_bbox ();
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parameter IN = 0;
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if (IN) begin : gen_hasbbox
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// Should not warn, see bug2430
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BLACKBOXED bboxed ();
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end
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endmodule
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