10 lines
312 B
Plaintext
10 lines
312 B
Plaintext
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2020 Yutetsu TAKATSUKASA
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// SPDX-License-Identifier: Unlicense
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`verilator_config
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hier_block -module "sub?"
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hier_block -module "delay" // matches recursive modules
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