verilator/test_regress/t/t_flag_main_top_name.py

22 lines
711 B
Python
Executable File

#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# This program is free software; you can redistribute it and/or modify it
# under the terms of either the GNU Lesser General Public License Version 3
# or the Perl Artistic License Version 2.0.
# SPDX-FileCopyrightText: 2024 Wilson Snyder
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.top_filename = "t/t_flag_main_top_name.v"
test.compile(verilator_flags=["-Mdir " + test.obj_dir, "--exe", "--build", "--main"],
verilator_flags2=["--top-module top", "--main-top-name ALTOP"],
make_main=False)
test.execute()
test.passes()