11 lines
288 B
Plaintext
11 lines
288 B
Plaintext
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2019 by Stefan Wallentowitz.
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`verilator_config
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sc_bv -module "t" -var "ibv1_vlt"
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sc_bv -module "*" -var "ibv16_vlt"
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sc_bv -module "*" -var "obv*_vlt"
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