verilator/test_regress/t/t_param_default_bad.v

17 lines
285 B
Systemverilog

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain.
// SPDX-FileCopyrightText: 2003 Wilson Snyder
// SPDX-License-Identifier: CC0-1.0
module m #(
parameter int Foo
);
endmodule
module t;
m foo ();
endmodule