16 lines
322 B
Systemverilog
16 lines
322 B
Systemverilog
// DESCRIPTION: Verilator: Test of select from constant
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2020 Wilson Snyder
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// SPDX-License-Identifier: CC0-1.0
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module t;
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bit [2:0] uns;
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initial begin
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uns = 1;
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if (uns > 3'b111) $stop;
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end
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endmodule
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