verilator/test_regress/t/t_forceable_net.vlt

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// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain.
// SPDX-FileCopyrightText: 2021 Geza Lore
// SPDX-License-Identifier: CC0-1.0
`verilator_config
forceable -module "*" -var "net_*"