24 lines
394 B
Systemverilog
24 lines
394 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain
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// SPDX-FileCopyrightText: 2025 Antmicro
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// SPDX-License-Identifier: CC0-1.0
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int x = 0;
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function int increment_x;
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x++;
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return x;
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endfunction
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module t;
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initial begin
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fork
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increment_x();
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#1 disable increment_x;
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join
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end
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endmodule
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