15 lines
395 B
Systemverilog
15 lines
395 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2025 Wilson Snyder
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// SPDX-License-Identifier: CC0-1.0
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module m1;
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m3 u_13 ();
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initial $display("liba:m1 %%m=%m %%l=%l");
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endmodule
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module m3; // Module name duplicated between libraries
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initial $display("liba:m3 %%m=%m %%l=%l");
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endmodule
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