14 lines
299 B
Systemverilog
14 lines
299 B
Systemverilog
// DESCRIPTION: Verilator: Test of select from constant
|
|
//
|
|
// This file ONLY is placed under the Creative Commons Public Domain.
|
|
// SPDX-FileCopyrightText: 2025 Wilson Snyder
|
|
// SPDX-License-Identifier: CC0-1.0
|
|
|
|
module t;
|
|
|
|
bit [99:0] wide = $c100("0");
|
|
|
|
initial $display("%d", wide);
|
|
|
|
endmodule
|