20 lines
413 B
Systemverilog
20 lines
413 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2011 Wilson Snyder
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// SPDX-License-Identifier: CC0-1.0
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module t;
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localparam LP = 1;
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(* attr_name1 *)
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(* attr_name1 = 1 *)
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(* attr_name1 = LP *)
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(* attr_name1 = LP + 2, attr_name2 *)
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(* attr_name1 = val1, attr_name2=1 *)
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initial $finish;
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endmodule
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