21 lines
367 B
Systemverilog
21 lines
367 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2025 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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package Pkg;
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endpackage
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module t;
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IOBUF iocell (
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.O (in),
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.IO(pad),
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.I ('0),
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.T (~oe)
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);
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endmodule
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package Pkg;
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endpackage
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