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The REPLACE_SHIFTL_SHIFTL and REPLACE_SHIFTR_SHIFTR peephole optimizations fold '(a << b) << c' into 'a << (b + c)' (and likewise for '>>'), but computed 'b + c' in the width of the shift-amount operand. When 'b + c' overflows that width it wraps around, producing a too-small shift amount and a wrong result. Compute the sum one bit wider than the amounts so it cannot overflow. Fixes #7955
.. SPDX-FileCopyrightText: 2003-2026 Wilson Snyder SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 Verilator Documentation ======================= This folder contains sources for Verilator documentation. For formatted documentation see: - `Verilator README <https://github.com/verilator/verilator>`_ - `Verilator installation and package directory structure <https://verilator.org/install>`_ - `Verilator manual (HTML) <https://verilator.org/verilator_doc.html>`_, or `Verilator manual (PDF) <https://verilator.org/verilator_doc.pdf>`_ - `Subscribe to Verilator announcements <https://github.com/verilator/verilator-announce>`_ - `Verilator forum <https://verilator.org/forum>`_ - `Verilator issues <https://verilator.org/issues>`_