verilator/test_regress
Yutetsu TAKATSUKASA 7a18adc716
Emit timescale in hierarchical block only when timescale is specified (#2735)
* Add a test for hierarchical verilation without timescale

* Emit timeunit in hierarchical wrapper only when it is specified in the input design or command line option.

* Update src/V3AstNodes.h

Co-authored-by: Wilson Snyder <wsnyder@wsnyder.org>

Co-authored-by: Wilson Snyder <wsnyder@wsnyder.org>
2021-01-02 08:31:27 +09:00
..
t Emit timescale in hierarchical block only when timescale is specified (#2735) 2021-01-02 08:31:27 +09:00
.gdbinit Delay parsing of associative arrays until dtypes known. 2020-06-09 07:13:40 -04:00
.gitignore Ignore some files generated by modelsim (#2669) 2020-12-05 21:55:56 -05:00
CMakeLists.txt Copyright year update 2021-01-01 10:29:54 -05:00
Makefile Copyright year update 2021-01-01 10:29:54 -05:00
Makefile_obj Copyright year update 2021-01-01 10:29:54 -05:00
driver.pl Copyright year update 2021-01-01 10:29:54 -05:00
input.vc Internal coverage improvements 2020-09-18 21:27:36 -04:00
input.xsim.vc Add XSim support to driver.pl, bug1493. 2019-08-29 17:00:49 -04:00