verilator/test_regress
Geza Lore 9a231d254d
Optimize Dfg cycle breaking to do less work (#7210)
When a vertex is made acyclic, conservatively update the SCC map to
propagate and mark connected vertices as acyclic as much as possible.
This way we can stop early if the graph becomes acyclic after some
fixups. This can significantly reduce the number of fixups needing to be
applied, avoiding introducing redundancy.
2026-06-19 22:28:50 +01:00
..
t Optimize Dfg cycle breaking to do less work (#7210) 2026-06-19 22:28:50 +01:00
.gdbinit
.gitignore
AGENTS.md CI: Autoformat markdown files 2026-06-15 17:44:50 -04:00
CMakeLists.txt Remove multi-threaded FST tracing (#7443) 2026-04-19 16:02:12 +01:00
Makefile Test: Remove old Makefile rules 2026-04-13 21:09:09 -04:00
Makefile_obj
driver.py Apply 'make format' 2026-06-02 20:47:02 +00:00
input.vc
input.xsim.vc