verilator/test_regress
Krzysztof Bieganski 97e9996f0b
Fix optimized-out sentrees with `--timing` (#5080) (#5349)
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
2024-08-08 21:57:12 +01:00
..
t Fix optimized-out sentrees with `--timing` (#5080) (#5349) 2024-08-08 21:57:12 +01:00
.gdbinit Revert .gdbinit modified by accident. (#4330) 2023-06-30 16:57:31 -04:00
.gitignore
CMakeLists.txt Copyright year update 2024-01-01 03:19:59 -05:00
Makefile Make installation relocatable, and the installation testable (#4927) 2024-03-01 00:08:28 +00:00
Makefile_obj Copyright year update 2024-01-01 03:19:59 -05:00
driver.pl Tests: Fail with `test.pl-file-needs-have_solver()-call` if forget have_solver() 2024-07-13 08:55:06 -04:00
input.vc Tests: Avoid verilated.v include in most tests 2024-02-27 18:08:37 -05:00
input.xsim.vc Tests: Avoid verilated.v include in most tests 2024-02-27 18:08:37 -05:00