40 lines
840 B
Systemverilog
40 lines
840 B
Systemverilog
// This program is free software; you can redistribute it and/or modify it
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// under the terms of either the GNU Lesser General Public License Version 3
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// or the Perl Artistic License Version 2.0.
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// SPDX-FileCopyrightText: 2026 Wilson Snyder
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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typedef struct {
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int BAR_INT;
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bit BAR_BIT;
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byte BAR_ARRAY[0:3];
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} foo_t;
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interface intf #(
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parameter foo_t FOO = '{4, 1'b1, '{8'd1, 8'd2, 8'd4, 8'd8}}
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) ();
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endinterface
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module sub (
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intf the_intf_port[4]
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);
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localparam int intf_foo_bar_int = the_intf_port[0].FOO.BAR_INT;
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initial begin
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#1;
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if (intf_foo_bar_int != 4) $stop;
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end
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endmodule
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module t;
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intf the_intf[4] ();
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sub the_sub (.the_intf_port(the_intf));
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initial begin
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#2;
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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