verilator/test_regress/t/t_clocking_bad4.out

47 lines
2.4 KiB
Plaintext

%Error: t/t_clocking_bad4.v:21:12: Skew must be constant (IEEE 1800-2023 14.4)
: ... note: In instance 't'
21 | input #cyc in;
| ^~~
... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
%Error: t/t_clocking_bad4.v:22:13: Skew cannot be negative
: ... note: In instance 't'
22 | input #(-1) out;
| ^
%Error: t/t_clocking_bad4.v:29:10: Usage of cycle delays requires default clocking (IEEE 1800-2023 14.11)
: ... note: In instance 't'
29 | always ##1;
| ^~
%Error: t/t_clocking_bad4.v:30:14: Only non-blocking assignments can write to clockvars (IEEE 1800-2023 14.16)
: ... note: In instance 't'
30 | always cb1.out = clk;
| ^~~
%Error: t/t_clocking_bad4.v:31:14: Only non-blocking assignments can write to clockvars (IEEE 1800-2023 14.16)
: ... note: In instance 't'
31 | assign cb1.out = clk;
| ^~~
%Error: t/t_clocking_bad4.v:32:20: Only non-blocking assignments can write to clockvars (IEEE 1800-2023 14.16)
: ... note: In instance 't'
32 | always write(cb1.out);
| ^~~
%Error: t/t_clocking_bad4.v:33:21: Event controls cannot be used in synchronous drives (IEEE 1800-2023 14.16)
: ... note: In instance 't'
33 | always cb1.out <= @(posedge clk) 1;
| ^
%Error: t/t_clocking_bad4.v:34:21: Only cycle delays can be used in synchronous drives (IEEE 1800-2023 14.16)
: ... note: In instance 't'
34 | always cb1.out <= #1 1;
| ^
%Error: t/t_clocking_bad4.v:35:17: Cycle delays not allowed as intra-assignment delays (IEEE 1800-2023 14.11)
: ... note: In instance 't'
35 | always out <= ##1 1;
| ^~
%Error: t/t_clocking_bad4.v:38:9: Cannot write to input clockvar (IEEE 1800-2023 14.3)
: ... note: In instance 't'
38 | cb1.in = 1;
| ^~
%Error: t/t_clocking_bad4.v:39:18: Cannot read from output clockvar (IEEE 1800-2023 14.3)
: ... note: In instance 't'
39 | $display(cb1.out);
| ^~~
%Error: Exiting due to