verilator/test_regress/t/t_program.v

13 lines
304 B
Systemverilog

// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain.
// SPDX-FileCopyrightText: 2009 Wilson Snyder
// SPDX-License-Identifier: CC0-1.0
program t;
initial begin
$write("*-* All Finished *-*\n");
$finish;
end
endprogram