27 lines
516 B
Systemverilog
27 lines
516 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2023 Antmicro Ltd
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// SPDX-License-Identifier: CC0-1.0
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virtual class VBase;
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endclass
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class Cls#(parameter type T = VBase);
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T t;
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function new;
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t = new;
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endfunction
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endclass
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virtual class ClsVirt#(parameter type T);
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endclass
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module t;
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initial begin
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Cls c = new; // Error
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ClsVirt#(VBase) cv = new; // Error
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$stop;
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end
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endmodule
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