16 lines
291 B
Systemverilog
16 lines
291 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain
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// SPDX-FileCopyrightText: 2025 Antmicro
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// SPDX-License-Identifier: CC0-1.0
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package foo;
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class bar #(
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type T = int
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);
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endclass
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endpackage
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;
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import foo::bar;
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