verilator/test_regress
Geza Lore 59cb53cfbc
Set trigger vector in whole words (#5857)
Having many triggers still hits a bottleneck in LLVM leading to long
compile times.

Instead of setting triggers bit-wise, set them as a whole 64-bit word
when possible. This improves C++ compile times by ~4x on some large
designs and has minor run-time performance benefit.
2025-03-14 14:06:51 +00:00
..
t Set trigger vector in whole words (#5857) 2025-03-14 14:06:51 +00:00
.gdbinit
.gitignore
CMakeLists.txt
Makefile
Makefile_obj
driver.py Add `--trace-saif` for SAIF power traces (#5812) 2025-03-07 10:41:29 -05:00
input.vc
input.xsim.vc