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https://github.com/verilator/verilator.git
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Yilou Wangandgithub action
316fb02c60
* Support assignment patterns as EQ/NEQ comparison operands * Apply 'make format' * update the .out file * add both-sides case --------- Co-authored-by: github action <[email protected]>
19 lines
486 B
Python
Executable File
19 lines
486 B
Python
Executable File
#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of either the GNU Lesser General Public License Version 3
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# or the Perl Artistic License Version 2.0.
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# SPDX-FileCopyrightText: 2026 Wilson Snyder
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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test.compile()
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test.execute()
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test.passes()
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