36 lines
922 B
Systemverilog
36 lines
922 B
Systemverilog
// DESCRIPTION: Verilator: Demonstrate struct literal param assignment problem
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//
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// This file ONLY is placed under the Creative Commons Public Domain.
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// SPDX-FileCopyrightText: 2024 Wilson Snyder
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// SPDX-License-Identifier: CC0-1.0
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interface intf #(
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parameter int WRITE_DATA_WIDTH
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) ();
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logic [WRITE_DATA_WIDTH-1:0] writedata;
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endinterface
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module t ( /*AUTOARG*/
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clk
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);
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input clk;
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generate
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genvar num_chunks;
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for (num_chunks = 1; num_chunks <= 2; num_chunks++) begin : gen_n
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localparam int decoded_width = 55 * num_chunks;
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intf #(.WRITE_DATA_WIDTH(decoded_width)) the_intf ();
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always @(posedge clk) begin
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for (int i = 0; i < decoded_width; i++) the_intf.writedata[i] <= '1;
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$display("%0d", the_intf.writedata);
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end
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end
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endgenerate
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// finish report
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always @(posedge clk) begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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