verilator/test_regress
Geza Lore aa9cde22c8
Use SIMD intrinsics to render VCD traces (#2289)
Use SIMD intrinsics to render VCD traces.

I have measured 10-40% single threaded performance increase with VCD
tracing on SweRV EH1 and lowRISC Ibex using SSE2 intrinsics to render
the trace. Also helps a tiny bit with FST, but now almost all of the FST
overhead is in the FST library.

I have reworked the tracing routines to use more precisely sized
arguments. The nice thing about this is that the performance without the
intrinsics is pretty much the same as it was before, as we do at most 2x
as much work as necessary, but in exchange there are no data dependent
branches at all.
2020-04-30 00:09:09 +01:00
..
t Use SIMD intrinsics to render VCD traces (#2289) 2020-04-30 00:09:09 +01:00
.gdbinit Debug: Add default .gdbinit file 2012-03-02 20:59:47 -05:00
.gitignore Add XSim support to driver.pl, bug1493. 2019-08-29 17:00:49 -04:00
CMakeLists.txt Add SPDX license identifiers. No functional change. 2020-03-21 11:24:24 -04:00
Makefile Add SPDX license identifiers. No functional change. 2020-03-21 11:24:24 -04:00
Makefile_obj Add SPDX license identifiers. No functional change. 2020-03-21 11:24:24 -04:00
driver.pl Fix tests failing on rerun after passing from clean. (#2281) 2020-04-23 21:27:06 -04:00
input.vc Fix DPI import/export to be standard compliant, #2236. 2020-04-07 19:07:47 -04:00
input.xsim.vc Add XSim support to driver.pl, bug1493. 2019-08-29 17:00:49 -04:00
vgen.pl Make vgen.pl deterministic 2020-04-24 04:53:33 +01:00