463 lines
16 KiB
C++
463 lines
16 KiB
C++
// -*- mode: C++; c-file-style: "cc-mode" -*-
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//*************************************************************************
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// DESCRIPTION: Verilator: Emit Verilog from tree
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//
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// Code available from: https://verilator.org
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//
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//*************************************************************************
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//
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// Copyright 2004-2025 by Wilson Snyder. This program is free software; you
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// can redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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//
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//*************************************************************************
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#include "V3PchAstNoMT.h" // VL_MT_DISABLED_CODE_UNIT
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#include "V3EmitXml.h"
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#include "V3EmitCBase.h"
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#include <map>
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#include <vector>
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VL_DEFINE_DEBUG_FUNCTIONS;
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// ######################################################################
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// Emit statements and expressions
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class EmitXmlFileVisitor final : public VNVisitorConst {
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// NODE STATE
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// Entire netlist:
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// AstNode::user1 -> uint64_t, number to connect crossrefs
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const VNUser1InUse m_user1InUse;
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// MEMBERS
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V3OutFile* const m_ofp;
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uint64_t m_id = 0;
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// METHODS
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// Outfile methods
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V3OutFile* ofp() const { return m_ofp; }
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virtual void puts(const string& str) { ofp()->puts(str); }
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virtual void putsNoTracking(const string& str) { ofp()->putsNoTracking(str); }
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virtual void putsQuoted(const string& str) {
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// Quote \ and " for use inside C programs
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// Don't use to quote a filename for #include - #include doesn't \ escape.
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// Duplicate in V3File - here so we can print to string
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putsNoTracking("\"");
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putsNoTracking(V3OutFormatter::quoteNameControls(str, V3OutFormatter::LA_XML));
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putsNoTracking("\"");
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}
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// XML methods
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void outputId(AstNode* nodep) {
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if (!nodep->user1()) nodep->user1(++m_id);
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puts("\"" + cvtToStr(nodep->user1()) + "\"");
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}
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void outputTag(AstNode* nodep, const string& tagin) {
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string tag = tagin;
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if (tag == "") tag = VString::downcase(nodep->typeName());
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puts("<" + tag);
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puts(" " + nodep->fileline()->xmlDetailedLocation());
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if (VN_IS(nodep, NodeDType)) {
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puts(" id=");
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outputId(nodep);
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}
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if (nodep->name() != "") {
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puts(" name=");
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putsQuoted(nodep->prettyName());
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}
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if (nodep->tag() != "") {
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puts(" tag=");
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putsQuoted(nodep->tag());
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}
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if (const AstNodeDType* const dtp = VN_CAST(nodep, NodeDType)) {
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if (dtp->subDTypep()) {
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puts(" sub_dtype_id=");
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outputId(dtp->subDTypep()->skipRefp());
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}
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} else {
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if (nodep->dtypep()) {
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puts(" dtype_id=");
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outputId(nodep->dtypep()->skipRefp());
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}
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}
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}
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void outputChildrenEnd(AstNode* nodep, const string& tagin) {
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string tag = tagin;
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if (tag == "") tag = VString::downcase(nodep->typeName());
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if (nodep->op1p() || nodep->op2p() || nodep->op3p() || nodep->op4p()) {
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puts(">\n");
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iterateChildrenConst(nodep);
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puts("</" + tag + ">\n");
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} else {
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puts("/>\n");
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}
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}
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// VISITORS
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void visit(AstAssignW* nodep) override {
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outputTag(nodep, "contassign"); // IEEE: vpiContAssign
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outputChildrenEnd(nodep, "contassign");
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}
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void visit(AstCell* nodep) override {
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outputTag(nodep, "instance"); // IEEE: vpiInstance
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puts(" defName=");
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putsQuoted(nodep->modName()); // IEEE vpiDefName
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puts(" origName=");
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putsQuoted(nodep->origName());
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outputChildrenEnd(nodep, "instance");
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}
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void visit(AstNodeIf* nodep) override {
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outputTag(nodep, "if");
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puts(">\n");
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iterateAndNextConstNull(nodep->condp());
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puts("<begin>\n");
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iterateAndNextConstNull(nodep->thensp());
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puts("</begin>\n");
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if (nodep->elsesp()) {
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puts("<begin>\n");
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iterateAndNextConstNull(nodep->elsesp());
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puts("</begin>\n");
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}
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puts("</if>\n");
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}
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void visit(AstWhile* nodep) override {
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outputTag(nodep, "while");
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puts(">\n");
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if (nodep->condp()) {
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puts("<begin>\n");
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iterateAndNextConstNull(nodep->condp());
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puts("</begin>\n");
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}
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if (nodep->stmtsp()) {
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puts("<begin>\n");
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iterateAndNextConstNull(nodep->stmtsp());
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puts("</begin>\n");
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}
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if (nodep->incsp()) {
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puts("<begin>\n");
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iterateAndNextConstNull(nodep->incsp());
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puts("</begin>\n");
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}
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puts("</while>\n");
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}
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void visit(AstNetlist* nodep) override {
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puts("<netlist>\n");
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iterateChildrenConst(nodep);
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puts("</netlist>\n");
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}
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void visit(AstConstPool* nodep) override {
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if (!v3Global.opt.xmlOnly()) {
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puts("<constpool>\n");
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iterateChildrenConst(nodep);
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puts("</constpool>\n");
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}
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}
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void visit(AstInitArray* nodep) override {
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puts("<initarray>\n");
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const auto& mapr = nodep->map();
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for (const auto& itr : mapr) {
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puts("<inititem index=\"");
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puts(cvtToStr(itr.first));
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puts("\">\n");
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iterateChildrenConst(itr.second);
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puts("</inititem>\n");
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}
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puts("</initarray>\n");
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}
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void visit(AstNodeModule* nodep) override {
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outputTag(nodep, "");
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puts(" origName=");
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putsQuoted(nodep->origName());
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if (nodep->level() == 1
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|| nodep->level() == 2) // ==2 because we don't add wrapper when in XML mode
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puts(" topModule=\"1\""); // IEEE vpiTopModule
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if (nodep->modPublic()) puts(" public=\"true\"");
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outputChildrenEnd(nodep, "");
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}
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void visit(AstVar* nodep) override {
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const VVarType typ = nodep->varType();
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const string kw = nodep->verilogKwd();
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const string vt = nodep->dtypep() ? nodep->dtypep()->name() : "";
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outputTag(nodep, "");
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if (nodep->isIO()) {
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puts(" dir=");
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putsQuoted(kw);
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if (nodep->pinNum() != 0) puts(" pinIndex=\"" + cvtToStr(nodep->pinNum()) + "\"");
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puts(" vartype=");
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putsQuoted(!vt.empty() ? vt : typ == VVarType::PORT ? "port" : "unknown");
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} else {
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puts(" vartype=");
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putsQuoted(!vt.empty() ? vt : kw);
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}
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puts(" origName=");
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putsQuoted(nodep->origName());
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// Attributes
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if (nodep->attrClocker() == VVarAttrClocker::CLOCKER_YES) {
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puts(" clocker=\"true\"");
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} else if (nodep->attrClocker() == VVarAttrClocker::CLOCKER_NO) {
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puts(" clocker=\"false\"");
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}
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if (nodep->attrIsolateAssign()) puts(" isolate_assignments=\"true\"");
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if (nodep->isLatched()) puts(" latched=\"true\"");
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if (nodep->isSigPublic()) puts(" public=\"true\"");
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if (nodep->isSigUserRdPublic()) puts(" public_flat_rd=\"true\"");
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if (nodep->isSigUserRWPublic()) puts(" public_flat_rw=\"true\"");
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if (nodep->isGParam()) {
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puts(" param=\"true\"");
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} else if (nodep->isParam()) {
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puts(" localparam=\"true\"");
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}
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if (nodep->attrScBv()) puts(" sc_bv=\"true\"");
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if (nodep->attrSFormat()) puts(" sformat=\"true\"");
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outputChildrenEnd(nodep, "");
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}
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void visit(AstPin* nodep) override {
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// What we call a pin in verilator is a port in the IEEE spec.
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outputTag(nodep, "port"); // IEEE: vpiPort
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if (nodep->modVarp() && nodep->modVarp()->isIO()) {
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puts(" direction=\"" + nodep->modVarp()->direction().xmlKwd() + "\"");
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}
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puts(" portIndex=\"" + cvtToStr(nodep->pinNum()) + "\""); // IEEE: vpiPortIndex
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// Children includes vpiHighConn and vpiLowConn; we don't support port bits (yet?)
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outputChildrenEnd(nodep, "port");
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}
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void visit(AstSenItem* nodep) override {
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outputTag(nodep, "");
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puts(" edgeType=\"" + cvtToStr(nodep->edgeType().ascii()) + "\""); // IEEE vpiTopModule
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outputChildrenEnd(nodep, "");
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}
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void visit(AstModportVarRef* nodep) override {
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// Dump direction for Modport references
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const string kw = nodep->direction().xmlKwd();
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outputTag(nodep, "");
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puts(" direction=");
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putsQuoted(kw);
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outputChildrenEnd(nodep, "");
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}
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void visit(AstVarXRef* nodep) override {
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outputTag(nodep, "");
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puts(" dotted=");
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putsQuoted(nodep->dotted());
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outputChildrenEnd(nodep, "");
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}
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void visit(AstNodeCCall* nodep) override {
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outputTag(nodep, "");
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puts(" func=");
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putsQuoted(nodep->funcp() ? nodep->funcp()->name() : nodep->name());
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outputChildrenEnd(nodep, "");
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}
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void visit(AstSel* nodep) override {
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outputTag(nodep, "");
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puts(" widthConst=\"" + cvtToStr(nodep->widthConst()) + "\"");
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outputChildrenEnd(nodep, "");
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}
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// Data types
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void visit(AstBasicDType* nodep) override {
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outputTag(nodep, "basicdtype");
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if (nodep->isRanged()) {
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puts(" left=\"" + cvtToStr(nodep->left()) + "\"");
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puts(" right=\"" + cvtToStr(nodep->right()) + "\"");
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}
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if (nodep->isSigned()) puts(" signed=\"true\"");
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puts("/>\n");
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}
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void visit(AstIfaceRefDType* nodep) override {
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string mpn;
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outputTag(nodep, "");
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if (nodep->isModport()) mpn = nodep->modportName();
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puts(" modportname=");
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putsQuoted(mpn);
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outputChildrenEnd(nodep, "");
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}
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void visit(AstDisplay* nodep) override {
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outputTag(nodep, "");
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puts(" displaytype=");
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putsQuoted(nodep->verilogKwd());
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outputChildrenEnd(nodep, "");
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}
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void visit(AstElabDisplay* nodep) override {
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outputTag(nodep, "");
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puts(" displaytype=");
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putsQuoted(nodep->verilogKwd());
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outputChildrenEnd(nodep, "");
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}
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void visit(AstExtend* nodep) override {
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outputTag(nodep, "");
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puts(" width=");
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putsQuoted(cvtToStr(nodep->width()));
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puts(" widthminv=");
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putsQuoted(cvtToStr(nodep->lhsp()->widthMinV()));
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outputChildrenEnd(nodep, "");
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}
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void visit(AstExtendS* nodep) override {
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outputTag(nodep, "");
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puts(" width=");
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putsQuoted(cvtToStr(nodep->width()));
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puts(" widthminv=");
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putsQuoted(cvtToStr(nodep->lhsp()->widthMinV()));
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outputChildrenEnd(nodep, "");
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}
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// Default
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void visit(AstNode* nodep) override {
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outputTag(nodep, "");
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outputChildrenEnd(nodep, "");
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}
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public:
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EmitXmlFileVisitor(AstNode* nodep, V3OutFile* ofp)
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: m_ofp{ofp} {
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iterateConst(nodep);
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}
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~EmitXmlFileVisitor() override = default;
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};
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//######################################################################
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// List of module files xml visitor
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class ModuleFilesXmlVisitor final : public VNVisitorConst {
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// MEMBERS
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std::ostream& m_os;
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std::set<std::string> m_modulesCovered;
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std::deque<FileLine*> m_nodeModules;
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// METHODS
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// VISITORS
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void visit(AstNetlist* nodep) override {
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// Children are iterated backwards to ensure correct compilation order
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iterateChildrenBackwardsConst(nodep);
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}
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void visit(AstNodeModule* nodep) override {
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// Only list modules and interfaces
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// Assumes modules and interfaces list is already sorted level wise
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if (!nodep->dead() && (VN_IS(nodep, Module) || VN_IS(nodep, Iface))
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&& m_modulesCovered.insert(nodep->fileline()->filename()).second) {
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m_nodeModules.push_front(nodep->fileline());
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}
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}
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//-----
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void visit(AstNode*) override {
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// All modules are present at root so no need to iterate on children
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}
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public:
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// CONSTRUCTORS
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ModuleFilesXmlVisitor(AstNetlist* nodep, std::ostream& os)
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: m_os(os) { // Need () or GCC 4.8 false warning
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// Operate on whole netlist
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iterateConst(nodep);
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// Xml output
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m_os << "<module_files>\n";
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for (const FileLine* ifp : m_nodeModules) {
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m_os << "<file id=\"" << ifp->filenameLetters() << "\" filename=\""
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<< ifp->filenameEsc() << "\" language=\"" << ifp->language().ascii() << "\"/>\n";
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}
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m_os << "</module_files>\n";
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}
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~ModuleFilesXmlVisitor() override = default;
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};
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//######################################################################
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// Hierarchy of Cells visitor
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class HierCellsXmlVisitor final : public VNVisitorConst {
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// MEMBERS
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std::ostream& m_os;
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std::string m_hier;
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bool m_hasChildren = false;
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// METHODS
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// VISITORS
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void visit(AstConstPool*) override {}
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void visit(AstNodeModule* nodep) override {
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if (nodep->level() >= 0
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&& nodep->level() <= 2) { // ==2 because we don't add wrapper when in XML mode
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m_os << "<cells>\n";
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m_os << "<cell " << nodep->fileline()->xmlDetailedLocation() //
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<< " name=\"" << nodep->prettyName() << "\"" << " submodname=\""
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<< nodep->prettyName() << "\"" << " hier=\"" << nodep->prettyName() << "\"";
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m_hier = nodep->prettyName() + ".";
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m_hasChildren = false;
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iterateChildrenConst(nodep);
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if (m_hasChildren) {
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m_os << "</cell>\n";
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} else {
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m_os << "/>\n";
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}
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m_os << "</cells>\n";
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}
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}
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void visit(AstCell* nodep) override {
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if (nodep->modp() && nodep->modp()->dead()) return;
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if (!m_hasChildren) m_os << ">\n";
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m_os << "<cell " << nodep->fileline()->xmlDetailedLocation() << " name=\"" << nodep->name()
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<< "\"" << " submodname=\"" << nodep->modName() << "\"" << " hier=\""
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<< m_hier + nodep->name() << "\"";
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const std::string hier = m_hier;
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m_hier += nodep->name() + ".";
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m_hasChildren = false;
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iterateChildrenConst(nodep->modp());
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if (m_hasChildren) {
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m_os << "</cell>\n";
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} else {
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m_os << "/>\n";
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}
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m_hier = hier;
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m_hasChildren = true;
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}
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void visit(AstBegin* nodep) override {
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VL_RESTORER(m_hier);
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if (nodep->name() != "") m_hier += nodep->name() + ".";
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iterateChildrenConst(nodep);
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}
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//-----
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void visit(AstNode* nodep) override { iterateChildrenConst(nodep); }
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public:
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// CONSTRUCTORS
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HierCellsXmlVisitor(AstNetlist* nodep, std::ostream& os)
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: m_os(os) { // Need () or GCC 4.8 false warning
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iterateConst(nodep);
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}
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~HierCellsXmlVisitor() override = default;
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};
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//######################################################################
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// EmitXml class functions
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void V3EmitXml::emitxml() {
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UINFO(2, __FUNCTION__ << ":");
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// All-in-one file
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const string filename = (v3Global.opt.xmlOutput().empty()
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? v3Global.opt.makeDir() + "/" + v3Global.opt.prefix() + ".xml"
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: v3Global.opt.xmlOutput());
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V3OutXmlFile of{filename};
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of.putsHeader();
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of.puts("<!-- DESCR"
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"IPTION: Verilator output: XML representation of netlist -->\n");
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of.puts("<verilator_xml>\n");
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{
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std::stringstream sstr;
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FileLine::fileNameNumMapDumpXml(sstr);
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of.puts(sstr.str());
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}
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{
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std::stringstream sstr;
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const ModuleFilesXmlVisitor moduleFilesVisitor{v3Global.rootp(), sstr};
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const HierCellsXmlVisitor cellsVisitor{v3Global.rootp(), sstr};
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of.puts(sstr.str());
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}
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const EmitXmlFileVisitor visitor{v3Global.rootp(), &of};
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of.puts("</verilator_xml>\n");
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}
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